mc68hc908jb8 Freescale Semiconductor, Inc, mc68hc908jb8 Datasheet - Page 149

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mc68hc908jb8

Manufacturer Part Number
mc68hc908jb8
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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9.8.8 USB Control Register 3
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
* PULLEN bit is reset by POR or LVI reset only.
Address:
TX1ST — Endpoint 0 Transmit First Flag
TX1STR — Clear Endpoint 0 Transmit First Flag
OSTALL0 — Endpoint 0 Force STALL Bit for OUT token
Reset:
Read:
Write:
This read-only bit is set if the endpoint 0 data transmit flag (TXD0F) is
set when the USB control logic is setting the endpoint 0 data receive
flag (RXD0F). In other words, if an unserviced endpoint 0 transmit flag
is still set at the end of an endpoint 0 reception, then this bit will be set.
This bit lets the firmware know that the endpoint 0 transmission
happened before the endpoint 0 reception.
Reset clears this bit.
Writing a logic 1 to this write-only bit will clear the TX1ST bit if it is set.
Writing a logic 0 to the TX1STR has no effect. Reset clears this bit.
This read/write bit causes endpoint 0 to return a STALL handshake
when polled by an OUT token by the USB host controller. Reset
clears this bit.
1 = IN transaction occurred before SETUP/OUT
0 = IN transaction occurred after SETUP/OUT
1 = Send STALL handshake
0 = Default
TX1ST
$001A
Bit 7
Universal Serial Bus Module (USB)
0
Figure 9-22. USB Control Register 3 (UCR3)
= Unimplemented
TX1STR
6
0
0
OSTALL0 ISTALL0
5
0
4
0
Universal Serial Bus Module (USB)
3
0
0
PULLEN ENABLE2 ENABLE1
0*
2
1
0
Technical Data
I/O Registers
Bit 0
0
149

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