mc68hc11e0fnr2 Freescale Semiconductor, Inc, mc68hc11e0fnr2 Datasheet - Page 172

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mc68hc11e0fnr2

Manufacturer Part Number
mc68hc11e0fnr2
Description
Hc11 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
10.18 MC68L11E9/E20 Serial Peirpheral Interface Characteristics
172
Electrical Characteristics
1. V
2. Time to data active from high-impedance state
3. Assumes 100 pF load on SCK, MOSI, and MISO pins
Num
10
11
otherwise noted
1
2
3
4
5
6
7
8
9
DD
= 3.0 Vdc to 5.5 Vdc, V
Frequency of operation
E-clock period
Operating frequency
Cycle time
Enable lead time
Enable lag time
Clock (SCK) high time
Clock (SCK) low time
Data setup time (inputs)
Data hold time (inputs)
Slave access time
Disable time (hold time
Data valid
Data hold time (outputs)
E clock
Master
Slave
Master
Slave
Slave
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
CPHA = 0
CPHA = 1
to high-impedance state)
Slave
(after enable edge)
Characteristic
(3)
(after enable edge)
(2)
(2)
SS
(1)
= 0 Vdc, T
M68HC11E Family Data Sheet, Rev. 5.1
A
= T
t
t
t
t
w(SCKH)m
Symbol
w(SCKL)m
w(SCKH)s
w(SCKL)s
t
L
t
t
CYC(m)
f
CYC(s)
t
t
lead(s)
f
t
t
t
op(m)
su(m)
lag(s)
t
to T
op(s)
su(s)
CYC
h(m)
t
h(s)
t
f
t
dis
t
ho
o
a
v
H
, all timing is shown with respect to 20% V
t
t
t
t
CYC
CYC
CYC
CYC
f
Min
500
o
1/2
1/2
40
40
40
40
dc
dc
/32
2
1
1
1
0
0
0
–30
–30
–30
–30
E9
16 t
16 t
Max
f
2.0
32
50
50
60
60
o
f
o
/2
CYC
CYC
t
t
t
t
CYC
CYC
CYC
CYC
f
o
Min
500
1/2
1/2
/128
dc
dc
40
40
40
40
2
1
1
1
0
0
0
–30
–30
–30
–30
DD
Freescale Semiconductor
E20
and 70% V
64 t
64 t
Max
128
f
2.0
o
50
50
60
60
f
/2
o
CYC
CYC
DD
, unless
MHz
Unit
MHz
t
t
t
CYC
CYC
CYC
ns
ns
ns
ns
ns
ns
ns
ns
ns

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