mc68ec030 Freescale Semiconductor, Inc, mc68ec030 Datasheet - Page 24

• Manufacturer Part Number: mc68ec030
• Description: Second-generation 32-bit Enhanced Embedded Controller
• Manufacturer: Freescale Semiconductor, Inc

AC ELECTRICAL SPECIFICATIONS -- READ AND WRITE CYCLES
2 4
N u m .
14A
(V
10B
9B
10A
12A
14B
9A
6A
6B
10
11
12
13
14
15
6
7
8
9
CC
14
1
11
7
=5.0Vdc
Clock High to Function Code, Size,
Clock High to
Function Code, Size,
Clock High to Function Code Size,
High
Clock High to Function Code Size,
Clock Low to
AS
AS
ECS
OCS
ECS
Function Code, Size,
(and
Clock Low to
Clock Low to
AS
Invalid
AS
DS
AS
AS
NOTE:
Address Valid
Negating Edge of
Invalid
,
,
to
Asserted to
(and
Width Asserted (Write)
(and
4
,
DS
DS
0.8 V
Width Asserted
DS
Width Asserted
OCS
DS
2.0 V
The voltage swing through this range should start outside and pass through the range so that the rise or fall will be
linear between 0.8 V and 2.0 V.
Negated to Function Code, Size,
Width Negated
Timing measurements are referenced to and from a low voltage of 0.8 V and a high voltage of 2.0 V, unless otherwise noted.
Asserted, Read)
DS
DS
5%; GND=0 Vdc; temperature in defined ranges; see Figures 11–16)
Impedance
Assertion Skew (Read)
Width Negated
, Read) Width Asserted (Synchronous Cycle)
Read) Width Asserted (Asynchronous Cycle)
AS
ECS
AS
ECS
DS
,
,
DS
/
DS
OCS
,
OCS
Asserted (Write)
ECS
,
Asserted,
RMC
RMC
CBREQ
Freescale Semiconductor, Inc.
Negated
Characterstics
Figure 10. Clock Input Timing Diagram
Asserted
For More Information On This Product,
,
,
MC68EC030 TECHNICAL DATA
IPEND
CIOUT
Negated
CBREQ
RMC
RMC
,
Go to: www.freescale.com
, Address Valid to
RMC
CIOUT
5
,
Valid
,
RMC CIOUT
CIOUT
,
IPEND
2
IPEND
, Address Valid to
, Address Data
,
,
CIOUT
CIOUT
1
AS
, Address
, Address
Asserted
,
3
Min
-10
27
10
10
70
30
30
30
2 5 M H z
0
0
3
0
0
3
5
7
0
0
7
M a x
15
—
—
—
20
—
40
—
18
10
—
—
—
18
18
—
—
—
—
Min
40 MHz
16
30
18
18
18
-6
0
0
3
0
0
2
5
5
5
5
0
0
3
M a x
10
—
—
—
14
—
25
—
10
—
—
—
10
12
—
—
—
—
6
M O T O R O L A
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns