mpc8250 Freescale Semiconductor, Inc, mpc8250 Datasheet - Page 20

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mpc8250

Manufacturer Part Number
mpc8250
Description
Mpc8250 Powerquicc Ii Integrated Communications Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Clock Configuration Modes
3
The MPC8250 has three clocking modes: local, PCI host, and PCI agent. The clocking mode is set
according to three input pins—PCI_MODE, PCI_CFG[0], PCI_MODCK—as shown in
In each clocking mode, the configuration of bus, core, PCI, and CPM frequencies is determined by seven
bits during the power-up reset—three hardware configuration pins (MODCK[1–3]) and four bits from
hardware configuration word[28–31] (MODCK_H). Both the PLLs and the dividers are set according to
the selected MPC8250 clock operation mode as described in the following sections.
3.1
Table 13
available by using the configuration pin (RSTCONF) and driving four pins on the data bus.
20
1
PCI_MODE
Determines PCI clock frequency range. Refer to
Clock Configuration Modes
MODCK[1–3]
1
0
0
0
0
shows the eight basic clock configurations for the MPC8250. Another 49 configurations are
Local Bus Mode
000
001
010
011
The UPM machine outputs change on the internal tick determined by the
memory controller programming; the AC specifications are relative to the
internal tick. Note that SDRAM and GPCM machine outputs change on
CLKin’s rising edge.
Clock configurations change only after POR is asserted.
PCI_CFG[0] PCI_MODCK
Pins
0
0
1
1
Input Clock
Frequency
33 MHz
33 MHz
33 MHz
33 MHz
Table 13. Clock Default Configurations
0
1
0
1
MPC8250 Hardware Specifications, Rev. 1
CPM Multiplication
Table 12. MPC8250 Clocking Modes
1
Factor
3
3
4
4
Clocking Mode
Section 3.2, “PCI
PCI agent
Local bus
PCI host
NOTE
NOTE
Frequency
100 MHz
100 MHz
133 MHz
133 MHz
CPM
Mode.”
Frequency Range
Core Multiplication
PCI Clock
(MHZ)
50–66
25–50
50–66
25–50
Factor
4
5
4
5
Table 13
Table 15
Table 17
Freescale Semiconductor
Frequency
133 MHz
166 MHz
133 MHz
166 MHz
Reference
Table
Core
and
and
and
Table 14
Table 16
Table 18
12.

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