mpc8314e Freescale Semiconductor, Inc, mpc8314e Datasheet - Page 14

• Manufacturer Part Number: mpc8314e
• Description: Powerquicc Ii Pro Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

Clock Input Timing
5.1
Table 6
MPC8314E.
5.2
The primary clock source for the MPC8314E can be one of two inputs, SYS_CLKIN or PCI_CLK,
depending on whether the device is configured in PCI host or PCI agent mode.
input (SYS_CLKIN/PCI_CLK) AC timing specifications for the MPC8314E.
14
SYS_CLKIN/PCI_CLK frequency
SYS_CLKIN/PCI_CLK cycle time
SYS_CLKIN/PCI_CLK rise and fall time
SYS_CLKIN/PCI_CLK duty cycle
SYS_CLKIN/PCI_CLK jitter
Notes:
1. Caution: The system, core, and security block must not exceed their respective maximum or minimum operating frequencies.
2. Rise and fall times for SYS_CLKIN/PCI_CLK are measured at 0.4 and 2.4 V.
3. Timing is guaranteed by design and characterization.
4. This represents the total input jitter—short term and long term—and is guaranteed by design.
5. The SYS_CLKIN/PCI_CLK driver’s closed loop jitter bandwidth should be <500 kHz at –20 dB. The bandwidth must be set
6. The parameter names PCI_CLK and PCI_SYNC_IN are used interchangeably in this document.
7. Spread spectrum is allowed upto 1% down-spread at 33kHz.(max. rate).
low to allow cascade-connected PLL-based devices to track SYS_CLKIN drivers with the specified jitter.
Input high voltage
Input low voltage
SYS_CLKIN input current
SYS_CR_CLKIN input current
PCI_SYNC_IN input current
RTC_CLK input current
USB_CLK_IN input current
USB_CR_CLK_IN input current
provides the clock input (SYS_CLKIN/PCI_SYNC_IN) DC timing specifications for the
Parameter/Condition
DC Electrical Characteristics
AC Electrical Characteristics
Parameter
MPC8314E PowerQUICC
Table 6. SYS_CLKIN DC Electrical Characteristics
Table 7. SYS_CLKIN AC Timing Specifications
t
0 V ≤ V
KHK
0 V ≤V
0 V ≤V
0 V ≤V
0 V ≤V
0 V ≤V
f
t
SYS_CLKIN
SYS_CLKIN
™
Symbol
Condition
t
/t
KH
SYS_CLKIN
II Pro Processor Hardware Specifications, Rev. 0
—
, t
IN
IN
IN
IN
IN
IN
—
—
KL
≤ NVDD
≤ NVDD
≤ NVDD
≤ NVDD
≤ NVDD
≤ NVDD
Min
0.6
24
15
40
—
Symbol
V
V
I
I
I
I
I
I
IN
IN
IN
IN
IN
IN
IH
IL
Typical
—
—
—
—
—
Min
-0.3
2.4
—
—
—
—
—
—
±150
Max
41.6
1.2
66
60
Table 7
NVDD + 0.3
Max
±10
±40
±10
±10
±10
±40
0.4
Freescale Semiconductor
provides the clock
Unit
MHz
ns
ns
ps
%
Unit
μA
μA
μA
μA
μA
μA
V
V
Notes
1, 6, 7
4, 5, 6
2, 6
3, 6
6