mpc8309 Freescale Semiconductor, Inc, mpc8309 Datasheet - Page 13

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mpc8309

Manufacturer Part Number
mpc8309
Description
Powerquicc Ii Pro Integrated Communications Processor Family Hardware Specifications
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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4
This section provides the clock input DC and AC electrical characteristics for the MPC8309.
4.1
Table 7
These specifications are also applicable for QE_CLK_IN.
4.2
The primary clock source for the MPC8309 can be one of two inputs, SYS_CLK_IN or PCI_SYNC_IN,
depending on whether the device is configured in PCI host or agent mode.
(SYS_CLK_IN/PCI_SYNC_IN) AC timing specifications for the MPC8309. These specifications are also
applicable for QE_CLK_IN.
Freescale Semiconductor
Input high voltage
Input low voltage
SYS_CLK_IN input current
SYS_CLK_IN input current
SYS_CLK_IN input current
SYS_CLK_IN frequency
SYS_CLK_IN cycle time
SYS_CLK_IN rise and fall time
PCI_SYNC_IN rise and fall time
MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0
Clock Input Timing
provides the clock input (SYS_CLK_IN/PCI_SYNC_IN) DC specifications for the MPC8309.
DC Electrical Characteristics
AC Electrical Characteristics
Parameter
Parameter/Condition
The rise/fall time on QUICC Engine input pins should not exceed 5 ns. This
should be enforced especially on clock signals. Rise time refers to signal
transitions from 10% to 90% of OV
90% to 10% of OV
Table 7. SYS_CLK_IN DC Electrical Characteristics
Table 8. SYS_CLK_IN AC Timing Specifications
OV
0.5 V  V
DD
DD
0 V  V
0 V  V
.
– 0.5 V  V
Condition
IN
IN
 OV
IN
 0.5 V or
f
t
 OV
SYS_CLK_IN
SYS_CLK_IN
t
PCH
Symbol
t
DD
KH
IN
, t
, t
DD
OV
– 0.5 V
NOTE
KL
PCL
DD
DD
; fall time refers to transitions from
Min
1.1
1.1
Symbol
24
15
V
V
I
I
I
IN
IN
IN
IH
IL
Typical
Table 8
–0.3
Min
2.4
66.67
Max
41.6
2.8
2.8
provides the clock input
OV
DD
Max
±50
0.4
±5
±5
MHz
Unit
+ 0.3
Clock Input Timing
ns
ns
ns
Notes
Unit
A
A
A
V
V
1
2
2
13

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