mpc8309 Freescale Semiconductor, Inc, mpc8309 Datasheet - Page 34

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mpc8309

Manufacturer Part Number
mpc8309
Description
Powerquicc Ii Pro Integrated Communications Processor Family Hardware Specifications
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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HDLC
Figure 22
Figure 23
generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge
is the active edge.
Figure 23
34
Outputs—External clock high impedance
Inputs—Internal clock input setup time
Inputs—External clock input setup time
Inputs—Internal clock input hold time
Inputs—External clock input hold time
Notes:
1. Output specifications are measured from the 50% level of the rising edge of QE_CLK_IN to the 50% level of the signal.
2. The symbols used for timing specifications follow the pattern of t
Timings are measured at the pin.
inputs and t
internal timing (HI) for the time t
MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0
Serial CLK (Input)
Note: The clock edge is selectable.
provides the AC test load.
and
shows the timing with external clock.
Output Signals:
Input Signals:
(first two letters of functional block)(reference)(state)(signal)(state)
(See Note)
(See Note)
Figure 24
Characteristic
Output
represent the AC timing from
Table 31. HDLC AC Timing Specifications
t
HEIVKH
serial
Figure 23. AC Timing (External Clock) Diagram
memory clock reference (K) goes from the high state (H) until outputs (O) are invalid (X).
Figure 22. AC Test Load
Z
0
= 50 
t
HEKHOX
t
HEKHOV
t
HEIXKH
Table
(first two letters of functional block)(signal)(state)(reference)(state)
for outputs. For example, t
31. Note that although the specifications
Symbol
t
t
t
HEKHOX
t
t
HEIVKH
HEIXKH
R
HIIVKH
HIIXKH
L
= 50 
1
(continued)
2
OV
Min
1
9
4
0
1
DD
HIKHOX
/2
Freescale Semiconductor
symbolizes the outputs
Max
8
Unit
ns
ns
ns
ns
ns
for

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