mpc89l515ap Megawin Technology, mpc89l515ap Datasheet - Page 26

• Manufacturer Part Number: mpc89l515ap
• Description: 8-bit Micro-controller
• Manufacturer: Megawin Technology

In other words, not all data reception will respond to RI, while specific data does.
By setting the SADDR and the SADEN, the user can filter out those data byte that doesn’t like to
care. This feature brings great help to reduce software overhead.
The above feature adapts to the serial port when operated in Mode1, Mode2, and Mode3.
Dealing with Mode 0, the user can ignore it.
Frame Error Detection
A missing bit in stop bit will set the FE bit in the SCON register. The FE bit shares the SCON bit 7
with SM0 and its actual function for SCON.7 is determined by SMOD0 (PCON.6). If SMOD0 is set,
SCON.7 functions as FE, otherwise functions as SM0. When used as FE bit, it can only be cleared
by software.
Reset
The RESET pin is used to reset this device. It is connected into the device to a Schmitt
Trigger buffer to get excellent noise immunity.
Any positive pulse from RESET pin must be kept at least two-machine cycle, or the
device cannot be reset.
Power Saving Mode and POF
There are two power saving modes, which are selectable to drive the MPC89x515A enter power-saving
mode.
1. IDLE mode
The user can set the bit PCON.0 to drive this chip entering IDLE mode.
In the IDLE mode, the internal clock is gated off to the CPU, but not to the interrupt, timer and serial
port functions.
There are two ways to terminate the idle. Activation of any enabled interrupt will cause
PCON.0 to be cleared by hardware to terminating the idle mode. The interrupt will be
serviced, and following RETI, the next instruction to be executed will be performed right
after the instruction that causes the device entering to the idle mode. Another way to
wake-up from idle is to pull RESET pin high to generate internal hardware reset.
2. POWER-DOWN mode
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MPC89x515A Data Sheet
MEGAWIN