mpc89l515ap Megawin Technology, mpc89l515ap Datasheet - Page 28

• Manufacturer Part Number: mpc89l515ap
• Description: 8-bit Micro-controller
• Manufacturer: Megawin Technology

Furthermore, it is a quite complex timing procedure to erase/program flash. Fortunately, the
MPC89x515A carried with convenient mechanism to help the user read/change the flash content.
Just filling the target address and data into several SFR, and triggering the built-in ISP automation,
the user can easily erase, read, and program the embedded flash and option registers OR1.
There are several SFR designed to help the user implement the ISP functionality.
SFR: IFD (ISP Flash Data register):
SFR: IFADRH (ISP Flash Address High):
SFR: IFADRL (ISP Flash Address Low):
SFR: IFMT (ISP Flash Mode Table):
SFR: SCMD (Sequential Command Data register for ISP) :
Note: OR0 cannot be changed by ISP operation. It can be accessed only by Writer. Only OR1 can be changed
IFD is the data port register for ISP operation. The data in IFD will be written into the desired address in operating
ISP write and it is the data window of readout in operating ISP read.
IFADRH is the high-byte address port for all ISP modes.
IFADRL is the low-byte address port for all ISP modes.
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Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Mode Selection
by ISP program.
1
0
0
0
0
1
1
1
0
0
1
1
0
1
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
(Data to be written into flash, or data got from flash)
(High byte of the address pointing to flash memory)
(Low byte of the address pointing to flash memory)
0
1
0
1
1
0
1
reserved
Bit-5
Bit-5
Bit-5
Bit-5
Bit-5
Standby
AP-memory read
AP-memory/Data-flash program
AP-memory/Data-flash page erase
OR1 memory erase (IFADRL[0]=1).
OR1 memory read ( IFADRL[0] =1)
OR1 memory program ( IFADRL[0] = 1)
ISP-Command (Device ID)
MPC89x515A Data Sheet
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
To Operate
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Mode Selection
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
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