dp83901a National Semiconductor Corporation, dp83901a Datasheet - Page 20

• Manufacturer Part Number: dp83901a
• Description: Serial Network Interface Controller
• Manufacturer: National Semiconductor Corporation

10 0 Internal Registers
All registers are 8-bit wide and mapped into four pages
which are selected in the Command Register (PS0 PS1)
Pins RA0 – RA3 are used to address registers within each
page Page 0 registers are those registers which are com-
10 1 REGISTER ADDRESS MAPPING
10 2 REGISTER ADDRESS ASSIGNMENTS
Page 0 Address Assignments (PS1
RA0 – RA3
00H
01H
02H
03H
04H
05H
06H
07H
08H
Command (CR)
Current Local DMA
Address 0 (CLDA0)
Current Local DMA
Address 1 (CLDA1)
Boundary Pointer
(BNRY)
Transmit Status
Register (TSR)
Number of Collisions
Register (NCR)
FIFO (FIFO)
Interrupt Status
Register (ISR)
Current Remote DMA Remote Start Address
Address 0 (CRDA0)
RD
Command (CR)
Page Start Register
(PSTART)
Page Stop Register
(PSTOP)
Boundary Pointer
(BNRY)
Transmit Page Start
Address (TPSR)
Transmit Byte Count
Register 0 (TBCR0)
Transmit Byte Count
Register 1 (TBCR1)
Interrupt Status
Register (ISR)
Register 0 (RSAR0)
e
0 PS0
WR
e
0)
20
monly accessed during SNIC operation while page 1 regis-
ters are used primarily for initialization The registers are
partitioned to avoid having to perform two write read cycles
to access commonly used registers
RA0 – RA3
09H
0AH
0BH
0CH
0DH
0EH
0FH
Current Remote DMA Remote Start Address
Address 1 (CRDA1)
Reserved
Reserved
Receive Status
Register (RSR)
Tally Counter 0
(Frame Alignment
Errors) (CNTR0)
Tally Counter 1
(CRC Errors)
(CNTR1)
Tally Counter 2
Missed Packet
Errors) (CNTR2)
RD
TL F 10469 – 16
Register 1 (RSAR1)
Remote Byte Count
Register 0 (RBCR0)
Remote Byte Count
Register 1 (RBCR1)
Receive Configuration
Register (RCR)
Transmit Configuration
Register (TCR)
Data Configuration
Register (DCR)
Interrupt Mask
Register (IMR)
WR