lm4550 National Semiconductor Corporation, lm4550 Datasheet - Page 16
lm4550
Manufacturer Part Number
lm4550
Description
Ac ?97 Rev 2.1 Multi-channel Audio Codec With Stereo Headphone Amplifier, Sample Rate Conversion And National 3d Sound
Manufacturer
National Semiconductor Corporation
Datasheet
1.LM4550.pdf
(25 pages)
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Application Information
AC Link Serial Interface Protocol
AC Link Output Frame: SDATA_OUT (output from
controller, input to LM4550)
The audio output frame (output from AC ’97 Controller)
contains control and PCM data targeted for the LM4550
control registers and stereo DAC. The Tag slot, slot 0, con-
tains 16 bits that tell the AC Link interface circuitry on the
LM4550 the validity of the following data slots.
A new audio output frame is signaled with a low to high
transition of SYNC. SYNC is synchronous to the rising edge
of BIT_CLK. On the next rising edge of BIT_CLK, the AC ’97
Controller drives SDATA_OUT with the first bit of slot 0. The
LM4550 samples SDATA_OUT on the falling edge of BIT-
_CLK. The AC ’97 Controller will continue outputting the
SDATA_OUT stream on each successive rising edge of
BIT_CLK.
SDATA_OUT Slot 0: Tag Phase
The first bit of slot 0 is designated the "Valid Frame" bit. If this
bit is 1, it indicates that the current data frame contains at
least one slot of valid data and the LM4550 will further
sample the next four bits and slots 7 & 8 and 6 & 9 to
FIGURE 3. AC 97 Bidirectional Audio Frame
FIGURE 4. AC Link Audio Output Frame
16
determine which frames do in fact have valid data. Valid slots
are signified by a 1 in their respective slot bit position.
FIGURE 5. Start of Audio Output Frame
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10097206
10097205