isp1106 NXP Semiconductors, isp1106 Datasheet - Page 5

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isp1106

Manufacturer Part Number
isp1106
Description
Advanced Universal Serial Bus Transceivers
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
Table 3:
9397 750 08872
Product data
Symbol
OE
RCV
VP
VM
SUSPND
MODE
GND
V
SPEED
D
D
VPO/VO
VMO/FSE0
CC(I/O)
[1]
Pin description
Pin
ISP1105
HBCC16
1
2
3
4
5
6
-
7
8
9
10
11
12
[2]
6.2 Pin description
ISP1106/7
HBCC16
1
2
3
4
5
6
7
8
9
10
11
12
ISP1106/7
TSSOP16
3
4
5
6
7
8
9
10
11
12
13
14
Rev. 06 — 30 November 2001
Type
I
O
O
O
I
I
-
-
I
AI/O
AI/O
I
I
Description
input for output enable (CMOS level with respect to V
active LOW); enables the transceiver to transmit data on
the USB bus
differential data receiver output (CMOS level with respect to
V
output state of RCV is preserved and stable during an SE0
condition
single-ended D receiver output (CMOS level with respect
to V
(SE0), error conditions, speed of connected device; driven
HIGH when no supply voltage is connected to V
V
single-ended D receiver output (CMOS level with respect
to V
(SE0), error conditions, speed of connected device; driven
HIGH when no supply voltage is connected to V
V
suspend input (CMOS level with respect to V
HIGH level enables low-power state while the USB bus is
inactive and drives output RCV to a LOW level
mode input (CMOS level with respect to V
level enables the differential input mode (VPO, VMO)
whereas a LOW level enables a single-ended input mode
(VO, FSE0). see
ground supply
supply voltage for digital I/O pins (1.65 to 3.6 V). When
V
three-state. This supply pin is totally independent of
V
voltage.
speed selection input (CMOS level with respect to V
adjusts the slew rate of differential data outputs D and D
according to the transmission speed:
negative USB data bus connection (analog, differential); for
low-speed mode connect to pin V
positive USB data bus connection (analog, differential); for
full-speed mode connect to pin V
driver data input (CMOS level with respect to V
Schmitt trigger); see
driver data input (CMOS level with respect to V
Schmitt trigger); see
CC(I/O)
reg(3.3)
reg(3.3)
CC(I/O)
CC(5.0)
LOW: low-speed (1.5 Mbit/s)
HIGH: full-speed (12 Mbit/s)
CC(I/O)
CC(I/O)
); driven LOW when input SUSPND is HIGH; the
is not connected, the (D D ) pins are in
and V
); for external detection of single-ended zero
); for external detection of single-ended zero
reg(3.3)
ISP1105/1106/1107
Table 5
and must never exceed the V
Table 5
Table 5
and
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Advanced USB transceivers
and
and
Table 6
pu(3.3)
pu(3.3)
Table 6
Table 6
via a 1.5 k resistor
via a 1.5 k resistor
CC(I/O)
CC(I/O)
CC(I/O)
CC(I/O)
); a HIGH
CC(5.0)
CC(5.0)
reg(3.3)
); a
CC(I/O)
CC(I/O)
,
,
5 of 24
and
and
);
,

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