isp1704a NXP Semiconductors, isp1704a Datasheet - Page 20

• Manufacturer Part Number: isp1704a
• Description: Ulpi Hi-speed Usb Transceiver
• Manufacturer: NXP Semiconductors

NXP Semiconductors
9. Modes of operation
ISP1704A_1
Product data sheet
9.1.1 Normal mode
9.1.2 Power-down mode
9.1 Power modes
When both V
to all the remaining pins, including V
range will not damage the ISP1704A chip.
When both V
ISP1704A will be fully functional as in normal mode.
When V
ISP1704A, the application system must detect the low voltage condition and set chip
select to deassert (that is, put the ISP1704A in power-down mode). This is to protect the
ULPI and USB interfaces from driving wrong levels. Under this condition, the V
voltage will not leak to USB pins (V
pins powered by V
driven to a defined state or terminated by using pull-up or pull-down resistors to avoid a
floating input condition. Other pins are not powered.
In normal mode, both V
ISP1704A is fully functional.
When V
power-down mode. In this mode, internal regulators are powered down to keep the V
current to a minimum. The voltage on the V
pins. In this mode, the ISP1704A pin states are given in
Table 8.
[1]
When V
powered. Other pins are not powered.
When the ISP1704A is put into power-down mode by disabling chip select, all the digital
pins that are powered by V
must be driven to defined states or terminated by using pull-up or pull-down resistors to
avoid a floating input condition. Other pins are not powered. In this mode, minimum
current will be drawn by V
Pin name
V
V
CHIP_SEL, CHIP_SEL_N, CFG1, TEST_N,
CLOCK, STP, NXT, DIR, DATA[7:0]
DP, DM, ID, REG1V8, REG3V3, CLKIN, i.c.,
RREF, PSW, FAULT, CHGR_DET_EN_N,
CHGR_DET
CC
CC(I/O)
These pins must not be externally driven to HIGH. Otherwise, the ISP1704A behavior is undefined and
leakage current will occur.
CC(I/O)
CC(I/O)
CC(I/O)
Pin states in power-down mode
CC(I/O)
CC
is powered and the V
is not present or when chip select is deasserted, the ISP1704A is put into
is not present, all the digital pins that are powered by V
and V
CC(I/O)
and V
CC(I/O)
CC
Rev. 01 — 28 July 2008
are configured as high-impedance inputs. These pins must be
CC
CC(I/O)
and V
CC(I/O)
are not powered, there will be no leakage from the V
are powered and are within the operating voltage range, the
to detect chip select status.
CC(I/O)
are configured as high-impedance inputs. These pins
BUS
CC
CC
, DP, DM and ID) and the V
voltage is below the operating range of the
are powered. Chip select is asserted. The
and V
Pin state when
V
3.0 V to 4.5 V
not powered
not powered
not powered
CC
CC(I/O)
CC(I/O)
pin will not leak to the V
is not present
. Applying V
[1]
[1]
[1]
Table
8.
ULPI HS USB transceiver
BUS
Pin state when chip
select is deasserted
3.0 V to 4.5 V
1.65 V to 1.95 V
high-Z
not powered
CC
within the normal
ISP1704A
pin. All the digital
CC(I/O)
CC(I/O)
© NXP B.V. 2008. All rights reserved.
[1]
are not
and/or V
CC(I/O)
BUS
19 of 66
CC
pin
BUS