lan91c100fd Standard Microsystems Corp., lan91c100fd Datasheet - Page 51

• Manufacturer Part Number: lan91c100fd
• Description: Lan91c100fd Rev. B Feast Fast Ethernet Controller With Full Duplex Capability
• Manufacturer: Standard Microsystems Corp.

HIGH-END ISA OR NON-BURST EISA MACHINES
On ISA machines, the LAN91C100FD is accessed as a 16 bit peripheral. No support for XT (8 bit peripheral) is provided.
The signal connections are listed in the following table:
SMSC DS – LAN91C100FD REV. B
IOCHRDY
nIOCS16
ISA BUS
SIGNAL
D0-D15
A1-A15
nIOWR
RESET
nSBHE
nIORD
IRQn
GND
AEN
VCC
A0
Table 4 - High-End ISA or Non-Burst EISA Machines Signal Connectors
nLDEV buffered
LAN91C100FD
nCYCLE W/nR
INTR0-INTR3
LCLK nADS
nBE2 nBE3
nRDYRTN
SIGNAL
D0-D15
A1-A15
RESET
ARDY
nBE0
nBE1
nWR
AEN
nRD
Address bus used for I/O space and register decoding.
Qualifies valid I/O decoding - enabled access when low.
I/O Read strobe - asynchronous read accesses. Address is valid
before leading edge.
I/O Write strobe - asynchronous write access. Address is valid
before leading edge. Data is latched on trailing edge.
This signal is negated on leading nRD, nWR if necessary. It is then
asserted on CLK rising edge after the access condition is satisfied.
16 bit data bus. The bus byte(s) used to access the device are a
function of nBE0 and nBE1:
nBE0 nBE1
Not used = tri-state on reads, ignored on writes
nLDEV is a totem pole output. Must be buffered using an open
collector driver. nLDEV is active on valid decodes of A15-A4 and
AEN=0.
No upper word access.
0
0
1
UNUSED PINS
0 Lower
1
0
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D0-D7
Lower
Not used
Upper
D8-D15
Not used
Upper
NOTES
Rev. 03-28-07