lan9118 Standard Microsystems Corp., lan9118 Datasheet - Page 103

• Manufacturer Part Number: lan9118
• Description: Lan9118 High-performance Single-chip 10/100 Non-pci Ethernet Controller
• Manufacturer: Standard Microsystems Corp.

High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
SMSC LAN9118
5.4.11
5.4.12
31-10
BITS
BITS
31-0
8-7
4-3
9
6
5
2
1
0
Wake-Up Frame Filter (WFF). Wake-Up Frame Filter (WFF). The Wake-up frame filter is configured
through this register using an indexing mechanism. After power-on reset, hardware reset, or soft reset,
the MAC loads the first value written to this location to the first DWORD in the Wake-up frame filter
(filter 0 byte mask). The second value written to this location is loaded to the second DWORD in the
wake-up frame filter (filter 1 byte mask) and so on. Once all eight DWORDs have been written, the
internal pointer will once again point to the first entry and the filter entries can be modified in the same
manner.
Note:
Reserved
Global Unicast Enable (GUE). When set, the MAC wakes up from power-saving mode on receipt of
a global unicast frame. A global unicast frame has the MAC Address [0] bit set to 0.
Reserved
Remote Wake-Up Frame Received (WUFR). The MAC, upon receiving a valid Remote Wake-up
frame, sets this bit..
Magic Packet Received (MPR). Tthe MAC, upon receiving a valid Magic Packet, sets this bit.
Reserved
Wake-Up Frame enabled (WUEN). When set, Remote Wake-Up mode is enabled and the MAC is
capable of detecting wake-up frames as programmed in the wake-up frame filter.
Magic Packet Enable (MPEN). When set, Magic Packet Wake-up mode is enabled.
Reserved
WUFF—Wake-up Frame Filter
This register is used to configure the wake up frame filter.
WUCSR—Wake-up Control and Status Register
This register contains data pertaining to the MAC’s remote wake-up status and capabilities.
Offset:
Default Value:
Offset:
Default Value:
This is a write-only register.
B
00000000h
C
00000000h
DATASHEET
103
DESCRIPTION
DESCRIPTION
Attribute:
Size:
Attribute:
Size:
WO
32 bits
R/W
32 bits
Revision 1.5 (07-11-08)