lan9303 Standard Microsystems Corp., lan9303 Datasheet - Page 273

• Manufacturer Part Number: lan9303
• Description: Small Form Factor Three Port 10/100 Managed Ethernet Switch With Single Mii/rmii/turbo Mii
• Manufacturer: Standard Microsystems Corp.

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
SMSC LAN9303/LAN9303i
13.4.3.3
31:27
21:19
BITS
26
25
24
23
22
RESERVED
Valid
When set, this bit makes the entry valid. It can be cleared to invalidate a
previous entry that contained the specified MAC address.
Age/Override
This bit is used by the aging and forwarding processes.
If the Static bit of this register is cleared, this bit should be set so that the
entry will age in the normal amount of time.
If the Static bit is set, this bit is used as a port state override bit. When set,
packets received with a destination address that matches the MAC address
in the SWE_ALR_WR_DAT_1 and SWE_ALR_WR_DAT_0 registers will be
forwarded regardless of the port state (except the Disabled state) of the
ingress or egress port(s). This is typically used to allow the reception of
BPDU packets in the non-forwarding state.
Static
When this bit is set, this entry will not be removed by the aging process
and/or be changed by the learning process. When this bit is cleared, this
entry will be automatically removed after 5 to 10 minutes of inactivity.
Inactivity is defined as no packets being received with a source address that
matches this MAC address.
Note:
Filter
When set, packets with a destination address that matches this MAC
address will be filtered.
Priority Enable
When set, this bit enables usage of the
entry. When clear, the Priority field is not used.
Priority
These bits specify the priority that is used for packets with a destination
address that matches this MAC address. This priority is only used if both the
Priority Enable
Switch Engine Global Ingress Configuration Register
(SWE_GLOBAL_INGRSS_CFG)
Switch Engine ALR Write Data 1 Register (SWE_ALR_WR_DAT_1)
This register is used in conjunction with the
(SWE_ALR_WR_DAT_0)
Entry command in the
This bit is normally set when adding manual entries.
Register #:
bit of this register and the
Switch Engine ALR Command Register
and contains the last 32 bits of ALR data to be manually written via the Make
1802h
DESCRIPTION
are set.
DATASHEET
Priority
DA Highest Priority
273
field for this MAC address
Size:
Switch Engine ALR Write Data 0 Register
bit of the
32 bits
(SWE_ALR_CMD).
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
RO
Revision 1.3 (08-27-09)
DEFAULT
000b
0b
0b
0b
0b
0b
-