lan9303 Standard Microsystems Corp., lan9303 Datasheet - Page 67

• Manufacturer Part Number: lan9303
• Description: Small Form Factor Three Port 10/100 Managed Ethernet Switch With Single Mii/rmii/turbo Mii
• Manufacturer: Standard Microsystems Corp.

Bit
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
SMSC LAN9303/LAN9303i
6.4
6.4.1
Valid
58
Override
Age /
The Switch Engine (SWE) is a VLAN layer 2 (link layer) switching engine supporting 3 ports. The SWE
supports the following types of frame formats: untagged frames, VLAN tagged frames, and priority
tagged frames. The SWE supports both the 802.3 and Ethernet II frame formats.
The SWE provides the control for all forwarding/filtering rules. It handles the address learning and
aging, and the destination port resolution based upon the MAC address and VLAN of the packet. The
SWE implements the standard bridge port states for spanning tree and provides packet metering for
input rate control. It also implements port mirroring, broadcast throttling, and multicast pruning and
filtering. Packet priorities are supported based on the IPv4 TOS bits and IPv6 Traffic Class bits using
a DIFFSERV Table mapping, the non-DIFFSERV mapped IPv4 precedence bits, VLAN priority using
a per port Priority Regeneration Table, DA based static priority, and Traffic Class mapping to one of 4
QoS transmit priority queues.
The following sections detail the various features of the Switch Engine.
MAC Address Lookup Table
The Address Logic Resolution (ALR) maintains a 512 entry MAC Address Table. The ALR searches
the table for the destination MAC address. If the search finds a match, the associated data is returned
indicating the destination port or ports, whether to filter the packet, the packet’s priority (used if
enabled), and whether to override the ingress and egress spanning tree port state.
the ALR table entry structure. Refer to the
(SWE_ALR_WR_DAT_0)
detailed descriptions of these bits.
57
Switch Engine (SWE)
Total multicast packets
Total packets with a late collision
Total packets with excessive collisions
Total packets with a single collision
Total packets with multiple collisions
Total collision count
Static
56
Filter
55
Priority
Enable
(Section 13.4.2.42, on page
Figure 6.3 ALR Table Entry Structure
54
and
(Section 13.4.2.37, on page
Switch Engine ALR Write Data 1 Register (SWE_ALR_WR_DAT_1)
53
DATASHEET
(Section 13.4.2.38, on page
Priority
(Section 13.4.2.40, on page
(Section 13.4.2.41, on page
52
(Section 13.4.2.39, on page
67
51
Switch Engine ALR Write Data 0 Register
268)
263)
50
Port
49
264)
266)
267)
265)
48
...
47
Revision 1.3 (08-27-09)
Figure 6.3
MAC Address
displays
for
0