dp8421a National Semiconductor Corporation, dp8421a Datasheet - Page 34

• Manufacturer Part Number: dp8421a
• Description: Microcmos Programmable 256k/1m/4m Dynamic Ram Controller/drivers
• Manufacturer: National Semiconductor Corporation

7 0 RAS and CAS Configuration Modes
7 4 ERROR SCRUBBING
In error scrubbing during refresh the user selects one two
or four RAS and CAS outputs per bank When performing
error detection and correction memory is always accessed
FIGURE 29a DRAM Array Setup for 4 Banks Using Error Scrubbing (C6 C5 C4
FIGURE 29b DRAM Array Setup for Error Scrubbing with 2 Banks (C6 C5 C4
FIGURE 28a DRAM Array Setup for 4 Banks Using Address Pipelining (C6 C5 C4
FIGURE 28b DRAM Array Setup for Address Pipelining with 2 Banks (C6 C5 C4
or C6 C5 C4
or C6 C5 C4
e
e
0 1 0 (Also Allowing Error Scrubbing) during Programming)
0 0 1 (Also Allowing Error Scrubbing) during Programming)
34
(Continued)
as words Since the CAS signals are not used to select
individual bytes the ECAS inputs can be tied low as shown
in Figures 29a and 29b
e
e
0 0 1 during Programming)
0 1 0 during Programming)
TL F 8588 – D4
e
e
TL F 8588 – D5
1 0 1
1 1 1
TL F 8588 – D7
TL F 8588 – D6