m66291 Renesas Electronics Corporation., m66291 Datasheet - Page 101

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m66291

Manufacturer Part Number
m66291
Description
Assp Usb2.0 Device Controller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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M 6 6 2 9 1 G P / H P
3.5.6
R e v 1 . 0 1
Clock
48 MHz clock is needed for the internal operation of the M66291.
A built-in PLL enables an external clock of 6, 12, 24, or 48 MHz to be input. Selection is realized by XTAL bit
of the USB Operation Enable Register. When an external 48 MHz clock is used, the PLL is not needed, so the
PLL operation should be disabled.
A built-in oscillation buffer enables the device to be clocked from a crystal unit.
The device is set to standby state by the USB Operation Enable Register. Oscillation is halted (clock input
halted) by XCKE bit, PLL is halted by PLLC bit, and clock supply to the USB block is halted by SCKE bit.
To prevent unstable behavior, clock supply to USB block must be applied as follow:
a. Enables clock input by the XCKE,
b. Wait until oscillation stabilizes,
c. Start PLL by the PLLC bit,
d. Wait until PLL oscillation stabilizes (less than 1ms),
e. then start clock supply to USB block by the SCKE bit.
2 0 0 4 . 1 1 . 0 1
p a g e 1 0 1 o f 1 2 2

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