at89c51cc03c-slsim ATMEL Corporation, at89c51cc03c-slsim Datasheet - Page 8
at89c51cc03c-slsim
Manufacturer Part Number
at89c51cc03c-slsim
Description
At89c51cc03 Enhanced 8-bit Mcu With Can Controller And Flash Memory
Manufacturer
ATMEL Corporation
Datasheet
1.AT89C51CC03C-SLSIM.pdf
(197 pages)
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Port 0 and Port 2
8
AT89C51CC03
Figure 1. Port 1, Port 3 and Port 4 Structure
Note:
Ports 0 and 2 are used for general-purpose I/O or as the external address/data bus. Port
0, shown in Figure 3, differs from the other Ports in not having internal pull-ups. Figure 3
shows the structure of Port 2. An external source can pull a Port 2 pin low.
To use a pin for general-purpose output, set or clear the corresponding bit in the Px reg-
ister (x = 0 or 2). To use a pin for general-purpose input, set the bit in the Px register to
turn off the output driver FET.
Figure 2. Port 0 Structure
Notes:
READ
LATCH
INTERNAL
BUS
WRITE
TO
LATCH
READ
PIN
READ
LATCH
INTERNAL
BUS
WRITE
TO
LATCH
The internal pull-up can be disabled on P1 when analog function is selected.
1. Port 0 is precluded from use as general-purpose I/O Ports when used as
2. Port 0 internal strong pull-ups assist the logic-one output for memory bus cycles only.
READ
PIN
address/data bus drivers.
Except for these bus cycles, the pull-up FET is off, Port 0 outputs are open-drain.
D
LATCH
P0.X
D
CL
LATCH
P1.X
P3.X
P4.X
ADDRESS LOW/
DATA
Q
Q
CONTROL
ALTERNATE
OUTPUT
FUNCTION
ALTERNATE
INPUT
FUNCTION
1
0
VDD
VCC
(2)
INTERNAL
PULL-UP (1)
4182N–CAN–03/08
P0.x (1)
P1.x
P3.x
P4.x
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