ata6832c ATMEL Corporation, ata6832c Datasheet - Page 7

• Manufacturer Part Number: ata6832c
• Description: High Temperature Triple Half-bridge Driver With Spi And Pwm
• Manufacturer: ATMEL Corporation

3.4
3.5
3.6
3.7
9216B–AUTO–06/11
Overtemperature Protection
Short-circuit Protection
Inhibit
PWM Mode
If the junction temperature of one or more output stages exceeds the thermal prewarning
threshold, T
temperature falls below the thermal prewarning threshold, T
bit can be read without transferring a complete 16-bit data word. The status of TP is available
at pin DO with the falling edge of CS. After the microcontroller has read this information, CS is
set high and the data transfer is interrupted without affecting the status of input and output
registers.
If the junction temperature of an output stage exceeds the thermal shutdown threshold,
T
to low. Additionally, the overload detection bit (OVL) in the output register is set. The output
can be enabled again when the temperature falls below the thermal shutdown threshold,
T
warning and shutdown threshold avoids oscillations.
The output currents are limited by a current regulator. Overcurrent detection is activated by
writing a high to the overcurrent shutdown bit (OCS) bit in the input register. When the current
in an output stage exceeds the overcurrent limitation and shut-down threshold, it is switched
off, following a delay time (t
ing status bit in the output register is set to low. For OCS = low, the overcurrent shutdown is
inactive and the OVL bit is not set by an overcurrent. By writing a high to the SRR bit in the
input register the OVL bit is reset and the disabled outputs are enabled.
The SI bit in the input register has to be set to zero to inhibit the Atmel
In this state, all output stages are then turned off but the serial interface remains active. The
output stages can be reactivated by setting bit SI to “1”.
The common input for all six outputs is pin PWM
which are controlled by PWM, is done by input data register PLx or PHx. In addition to the
PWM input register, the corresponding input registers HSx and LSs have to be set.
Switching the high side outputs is possible up to 25kHz, low side switches up to 8kHz.
Figure 3-3.
jswitch off
jswitch on
, the affected output is disabled and the corresponding bit in the output register is set
, and the SRR bit in the input register is set to high. The hysteresis of thermal pre-
Bit PLx/PHx
jPW set
Output Control by PWM
, the temperature prewarning bit (TP) in the output register is set. When the
Pin PWM
Bit LSx/HSx
dSd
). The over-load detection bit (OVL) is set and the correspond-
Atmel ATA6832C [Preliminary]
(Figure
3-3). The selection of the outputs,
jPW reset
, the bit TP is reset. The TP
Pin OUTx
®
ATA6832C.
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