sta381bws STMicroelectronics, sta381bws Datasheet - Page 55

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sta381bws

Manufacturer Part Number
sta381bws
Description
Sound Terminal 2.1-channel High-efficiency Digital Audio System Sound Terminal 2.1-channel High-efficiency Digital Audio System
Manufacturer
STMicroelectronics
Datasheet

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STA381BWS
6.11
6.11.1
FUNCT register (addr 0x0A)
Table 25.
Dual-band DRC
The STA381BWS device provides a dual-band DRC (B
data path, as depicted in
Figure 24. B
The low frequency information (LFE) is extracted from the left and right channels, removing
the high frequencies using a programmable Biquad filter, and then computing the difference
Reserved
Bit
6
5
4
2
1
0
D7
0
R
L
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FUNCT register
2
CRC
DRC scheme
D6
0
RST
0
1
0
0
0
0
Hi-pass XO
Hi-pass XO
Figure
B
B
2
filter
2
filter
APEQ
DRC
DRC
D5
1
AMDRC
MDRCE
Doc ID 018937 Rev 2
Name
APEQ
CRC
DRC
PEQ
24. Dual-band DRC is activated by setting MDRCE = 1.
-
- +
+
PEQ
D4
0
Description
‘0’: disable CRC computation and comparison
‘1’: enable CRC computation and comparison
‘0’: extended BQ disabled, 8th biquadratic filter disabled
‘1’: extended BQ enabled, 8th biquadratic filter enabled
‘0’: Normal operation
‘1’: PEQ disabled, disables all biquadratic filters
‘0’: STCompressor bypassed
‘1’: STCompressor enabled
‘0’: MDRCE bypassed
‘1’: MDRCE enabled
‘0’: DRC disabled
‘1’: DRC enabled
Channel 3
Channel 2
Channel 1
Channel 3
Volume
Volume
Volume
Volume
Reserved
D3
0
2
DRC) on the left and right channels
Register description: New Map
DRC 2
DRC 1
DRC 1
DRC 2
AMDRC
D2
0
+
+
MDRCE
D1
0
DRC
D0
0
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