sta381bws STMicroelectronics, sta381bws Datasheet - Page 92
sta381bws
Manufacturer Part Number
sta381bws
Description
Sound Terminal 2.1-channel High-efficiency Digital Audio System Sound Terminal 2.1-channel High-efficiency Digital Audio System
Manufacturer
STMicroelectronics
Datasheet
1.STA381BWS.pdf
(168 pages)
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Register description: New Map
6.30.3
6.30.4
6.30.5
92/168
Channel PWM enable (CPWMEN) bit
This bit, when set, activates a mute output in case the volume reaches a value lower
than -76 dBFS.
External amplifier hardware pin enabler (LPDP, LPD LPDE) bits
Pin 32 (INTLINE), normally indicating a fault condition, using the following 3 register
settings, can be reconfigured as a hardware pin enabler for an external headphone or line
amplifier.
In particular the LPDE bit, when set, activates this function. Accordingly, the LPD value (0 or
1) is exported on pin 32 and in case of power-down assertion, pin 32 is tied to LPDP.
The LPDP bit, when set, negates the value programmed as the LPD value, refer to the
following table.
Table 87.
Figure 27. Alternate function for INTLINE pin
Power-down delay selector (PNDLSL[2:0]) bits
The assertion of PWDN activates a counter that, by default, after 13 million clock cycles puts
the power bridge in tristate mode, independently from the fade-out time. Using these
registers it is possible to program this counter according to the following table.
“is the d evice in p ow erd o w n ?”
LPDP
x
0
0
1
1
External amplifier enabler configuration bits
LPD
‘0 ’
LPD]
0
1
0
1
x
Doc ID 018937 Rev 2
Y
N
Po w er B rid ge Fau lt
LPDE
0
1
1
1
1
LP D P
0
1
LPD E
Pin 32 output
INT_LINE
0
1
0
1
1
0
IN T L IN E
STA381BWS
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