sta381bw STMicroelectronics, sta381bw Datasheet - Page 9

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sta381bw

Manufacturer Part Number
sta381bw
Description
Sound Terminal 2.1-channel High-efficiency Digital Audio System
Manufacturer
STMicroelectronics
Datasheet

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STA381BW
8
9
10
7.17
7.18
7.19
7.20
7.21
7.22
7.23
7.24
7.25
7.26
7.27
7.28
7.29
7.30
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
8.1
8.2
8.3
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
EQ soft volume configuration registers (addr 0x37 - 0x38) . . . . . . . . . . 144
Short-circuit protection mode registers SHOK (address 0x47) . . . . . . . 148
Extended coefficient range up to -4...4 (address 0x49, 0x4A) . . . . . . . . 149
Miscellaneous registers (address 0x4B, 0x4C) . . . . . . . . . . . . . . . . . . . 150
Bad PWM detection registers (address 0x4D, 0x4E, 0x4F) . . . . . . . . . . 152
Enhanced zero-detect mute and input level measurement
F3XCFG (address 0x58; 0x59) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
STCompressorTM configuration register (address
Coefficient RAM CRC protection (address 0x60-0x6C) . . . . . . . . . . . . . 158
MISC3 (address 0x6E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
MISC4 (address 0x7E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
7.16.2
7.16.3
7.16.4
Extra volume resolution configuration registers (address 0x3F; 0x40) . . 145
PLL configuration registers (address 0x41; 0x42; 0x43; 0x44;
0x45; 0X46) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
7.22.1
7.22.2
7.22.3
7.22.4
7.22.5
7.22.6
(address 0x50-0x54) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
Headphone/Line out configuration register (address 0x55) . . . . . . . . . . 154
0x5A; 0x5B) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
Application schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Headphone and 2 Vrms line out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
Typical output configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
Extended post-scale range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
Extended attack rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
Extended BIQUAD selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
Rate power-down enable (RPDNEN) bit (address 0x4B, bit D7) . . . . . 150
Bridge immediate off (BRIDGOFF) bit (address 0x4B, bit D5) . . . . . . 150
Channel PWM enable (CPWMEN) bit (address 0x4B, bit D2) . . . . . . . 151
External amplifier hardware pin enabler (LPDP, LPD LPDE) bits (address
0x4C, bit D7, D6, D5) 151
Power-down delay selector (PNDLSL[2:0]) bits (address 0x4C, bit D4,
D3, D2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
Short-circuit check enable bit (address 0x4C, bit D0) . . . . . . . . . . . . . 152
Doc ID 018835 Rev 2
Contents
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