at42qt1060 ATMEL Corporation, at42qt1060 Datasheet - Page 13

• Manufacturer Part Number: at42qt1060
• Description: Qtouch? 6-channel Sensor Ic
• Manufacturer: ATMEL Corporation

4.5
4.6
9505E–AT42–02/09
Data Packet Format
Combining Address and Data Packets Into a Transmission
All data packets are 9 bits long, consisting of one data byte and an acknowledge bit. During a
data transfer, the host generates the clock and the START and STOP conditions, while the
Receiver is responsible for acknowledging the reception. An acknowledge (ACK) is signaled by
the Receiver pulling the SDA line low during the ninth SCL cycle. If the Receiver leaves the SDA
line high, a NACK is signaled.
A transmission consists of a START condition, an SLA+R/W, one or more data packets and a
STOP condition. The wired-ANDing of the SCL line is used to implement handshaking between
the host and the device. The device extends the SCL low period by pulling the SCL line low
whenever it needs extra time for processing between the data transmissions.
Holding down either SCL or SDA for clock stretching or any other purpose will slow down the
operation of the QT2160. If SCL or SDA is continuously held low for more than ~12ms, this will
be deemed as a error condition and the
Note: Each write or read cycle must end with a STOP condition. The QT2160 may not respond
correctly if a cycle is terminated by a new START condition.
Figure 4-7
between the SLA+R/W and the STOP.
Figure 4-6.
Figure 4-7.
SDA
SCL
SDA from
Transmitter
SDA from
Receiver
SCL from
Master
Aggregate
SDA
START
SLA+R/W
shows a typical data transmission. Note that several data bytes can be transmitted
Addr MSB
Data Packet Format
Packet Transmission
1
2
SLA+R/W
Data MSB
Addr LSB
1
7
R/W
8
2
ACK
I
2
9
C
-compatible unit reset.
Data Byte
7
Data MSB
1
Data LSB
2
8
Data Byte
ACK
7
9
AT42QT1060
Data LSB
8
ACK
STOP or
Next Data Byte
9
STOP
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