at42qt1060 ATMEL Corporation, at42qt1060 Datasheet - Page 6

• Manufacturer Part Number: at42qt1060
• Description: Qtouch? 6-channel Sensor Ic
• Manufacturer: ATMEL Corporation

2.4.2
2.4.3
2.4.4
2.4.5
2.5
2.6
6
Acquisition/Low Power Modes (LP)
Adjacent Key Suppression (AKS) Technology
AT42QT1060
I/O Mask
PWM Mask
Detection Mask
Active Level Mask
A 1 in any bit position of this mask sets the corresponding pin to an output. If a bit is 0, the pin is
an input and the function of the PWM, detect and active state masks will not matter for this pin.
The level of the input pins is reflected in the input Status register. Changes to the logic levels on
the inputs cause the CHG line to be asserted.
A 1 in any bit position in this mask sets the corresponding pin to operate in PWM mode when its
user output buffer is active and configured as an output. A zero sets the pin in digital mode. The
PWM value is set in the PWM register that is writable via I
A 1 in any bit position in this mask sets the corresponding pin to be controlled by the status
register. If the pin is configured as an output, it is asserted automatically if there is a detection on
the corresponding sensor channel. A zero in any bit sets the pin to be controlled by the user
output buffer, allowing the user to control the pins directly.
A 1 in any bit position in this mask sets the corresponding pin to be active high if configured as
an output. A zero sets the pin to be active low.
There are several different acquisition modes. These are controlled via the Low Power (LP)
mode byte (see
communication.
LP mode controls the intervals between acquisition measurements. Longer intervals consume
lower power but have increased response time. During calibration and during the detect
integrator (DI) period, the LP mode is temporarily set to LP mode 1 for a faster response.
The QT1060 operation is based on a fixed cycle time of approximately 16 ms. The LP mode
setting indicates how many of these periods exist per measurement cycle. For example, If LP
mode = 1, there is an acquisition every cycle (16 ms). If LP mode = 3, there is an acquisition
every 3 cycles (48 ms) etc.
SLEEP mode (LP mode = 0) is available for minimum current drain. In this mode, the device is
inactive, with the device status being held as it was before going to sleep, and no measurements
are carried out.
LP settings above mode 32 (512 ms) result in slower thermal drift compensation and should be
avoided in applications where fast thermal transients occur.
If LP mode = 255 the device operates in Free-run mode. In this mode the device will not enter LP
mode between measurements. The device continuously performs measurements one after
another, resulting in the fastest response time but the highest power consumption.
The device includes Atmel’s patented Adjacent Key Suppression (AKS) technology, to allow the
use of tightly spaced keys on a keypad with no loss of selectability by the user.
Section 6.12 on page
20) which can be written to via I
2
C-compatible communication.
2
C-compatible
9505E–AT42–02/09