x96012 Intersil Corporation, x96012 Datasheet - Page 4

• Manufacturer Part Number: x96012
• Description: Universal Sensor Conditioner With Dual Look Up Table Memory And Dacs
• Manufacturer: Intersil Corporation

Electrical Specifications
NOTES:
D/A Converter Characteristics
V
V
V
IFS
IFS
IFS
IFS
Offset
FSError
DNL
INL
V
V
I
I
t
3. The device goes into Standby: 200ns after any STOP, except those that initiate a nonvolatile write cycle. It goes into Standby t
4. t
5. For this range of V(V
6. These parameters are periodically sampled and not 100% tested.
7. TCO
OVER
UNDER
rDAC
ADCOK
POR
CC
SYMBOL
ISink
ISource
that initiates a nonvolatile write cycle. It also goes into Standby 9 clock cycles after any START that is not followed by the correct Slave Address
Byte.
minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
00
01
10
11
DAC
Ramp
WC
DAC
SYMBOL
DAC
is the time from a valid STOP condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It is the
ref
DAC
= [Max V(V
I1 or I2 Full Scale Current, with External Resistor
Setting
I1 or I2 Full Scale Current, with Internal Low
Current Setting Option
I1 or I2 Full Scale Current, with Internal Middle
Current Setting Option
I1 or I2 Full Scale Current, with Internal High
Current Setting Option
I1 or I2 D/A Converter Offset Error
I1 or I2 D/A Converter Full Scale Error
I1 or I2 D/A Converter Differential Nonlinearity
I1 or I2 D/A Converter Integral Nonlinearity with
Respect to a Straight Line Through 0 and the Full
Scale Value
I1 or I2 Sink Voltage Compliance
I1 or I2 Source Voltage Compliance
I1 or I2 Overshoot on D/A Converter Data Byte
Transition
I1 or I2 Undershoot on D/A Converter Data Byte
Transition
I1 or I2 Rise Time on D/A Converter Data Byte
Transition; 10% to 90%
Power-on Reset Threshold
Voltage
V
ADC Enable Minimum Voltage
REF
CC
REF
) - Min V(V
Ramp Rate
) the full scale sink mode current at I1 and I2 follows V(V
PARAMETER
PARAMETER
4
Conditions are as follows, unless otherwise specified. All typical values are for T
Maximum and minimum specifications are over the recommended operating conditions. All voltages are
referred to the voltage at pin VSS. All bits in control registers are “0”. 255Ω, 0.1%, resistor connected between
R
external 2kΩ resistor. 2-wire interface in “standby” (see Notes 8 and 9 on page 5). WP, A0, A1, and A2 floating.
V
REF
1
REF
and VSS, and another between R
)] x 10
pin unloaded. (Continued)
(See “Electrical Specifications” table starting on page 3 for standard conditions).
6
/(1.21V x +140°C).
Figure 11
Notes 8, 11
Notes 1, 8, 12
DAC input Byte = FFh,
Source or sink mode, V(I1) and V(I2)
are V
1.2V in sink mode.
See Notes 9 and 10.
Note 11
Notes 1, 12
Note 11
Notes 1, 12
DAC input byte changing from 00h to
FFh and vice versa, V(I1) and V(I2)
are V
1.2V in sink mode. See Note 1.
X96012
TEST CONDITIONS
CC
CC
2
TEST CONDITIONS
and V
- 1.2V in source mode and
- 1.2V in source mode and
SS
. 400kHz TTL input at SCL. SDA pulled to V
REF
) with a linearity error smaller than 1%.
(Note 2)
MIN
2.6
1.5
0.2
(Note 2)
MIN
1.56
0.64
-0.5
0.3
1.2
2.5
-2
-1
1
1
0
0
5
A
TYP
= +25°C and 5V at pin V
TYP
1.58
0.85
0.4
1.3
(Note 2)
CC
V
V
(Note 2)
MAX
CC
CC
2.8
2.8
MAX
50
1.06
V
V
WC
1.6
3.2
0.5
1.6
0.5
through an
30
1
2
1
CC
CC
0
0
November 19, 2007
- 1.2
- 2.5
after a STOP
mV/µs
FN8216.2
UNIT
UNIT
LSB
LSB
LSB
LSB
mA
mA
mA
mA
mA
µA
µA
µs
V
V
V
V
V
V
CC
.