aduc7032 Analog Devices, Inc., aduc7032 Datasheet - Page 52

• Manufacturer Part Number: aduc7032
• Description: Microconverter Integrated, Precision Battery Sensor
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
Current Channel ADC Control Register :
Name :
Address :
Default Value :
Access :
Function :
Note:
Bit
15
14, 13
12– 10
9
8
7, 6
5, 4
1, 1, 0 ADC System Zero-Scale Calibration
1, 1, 1 ADC System Full-Scale Calibration
Description
Current Channel ADC Enable
This bit is set to 1 by user code to enable the I-ADC
Clearing this bit to 0, powers down the I-ADC and resets the respective ADC READY bit in the ADCSTA MMR to 0
IIN Current Source Enable
0, 0
0, 1
1, 0
1, 1
NOTE: These current sources have a tolerance of +-30%. A PGA gain equal to or greater than 2 ( ADC0CON [3-0 ] != 0000 )
must be used when current sources are enabled.
Not Used
These bits are reserved for future functionality and should be written as zero
Current Channel ADC Output Coding
This bit is set to 1 by user code to configure I-ADC output coding as unipolar
This bit is cleared to 0 by user code to configure I-ADC output coding as 2’s complement
Not Used
This bit is reserved for future functionality and should be written as zero
Current Channel ADC Input Select
0, 0
0, 1
1, 0
1, 1
Current Channel ADC Reference Select
0, 0
0, 1
1, 0
1, 1
In this mode, an zero-scale calibration is performed on enabled ADC channels against an external zero-scale voltage
driven at the ADC input pins. The calibration is carried out at the user programmed ADC settings, therefore, as with a
normal single ADC conversion, it will take 3 ADC conversion cycles before a fully settled calibration result is ready.
In this mode, an full-scale calibration is performed on enabled ADC channels against an external full-scale voltage
driven at the ADC input pins.
ADC0CON
0xFFFF050C
0x0002
Read/Write
The Current Channel ADC Control MMR is an 16-bit register that is used to configure the I-ADC.
If the Current ADC is reconfigured via ADC0CON, the Voltage and Temperature ADCs are also reset.
Current Sources Off
Enable 50uA current source on IIN+
Enable 50uA current source on IIN-
Enable 50uA current source on both IIN- and IIN+
IIN+, IIN-
IIN-, IIN-
ADC Reference/136, 0V
ADC Reference/(1.0625XGain), 0V Diagnostic, test voltage for gain settings > 128
Note: If (REG_AVDD, AGND) divided by 2 Reference is selected, REG_AVDD is used for Vref in this mode. This will
lead to ADC0DAT scaled by two
Not Defined
Internal, 1.2V precision reference selected. In ADC Low Power Mode, the Voltage Reference selection is
controlled by ADCMDE[5]
External reference inputs (VREF, GND_SW) selected
External reference inputs divided by 2 (VREF, GND_SW)/2 selected, this allows an external reference up to
REG_AVDD
(REG_AVDD, AGND) divided by 2 selected
Table 24 : ADC0CON MMR Bit Designations
Diagnostic, internal short configuration
Diagnostic, test voltage for gain settings <= 128
Rev. PrD | Page 52 of 128
ADuC7032