lm2501sl National Semiconductor Corporation, lm2501sl Datasheet - Page 5

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lm2501sl

Manufacturer Part Number
lm2501sl
Description
Mobile Pixel Link Mpl Camera Interface Serializer And Deserializer
Manufacturer
National Semiconductor Corporation
Datasheet
PARALLEL BUS TIMING
t
t
t
t
PC
PC
t
t
SERIAL BUS TIMING
t
t
POWER UP TIMING (see Figures 5, 6)
t
t
t
t
t
t
t
t
t
t
t
t
POWER OFF TIMING
t
t
SET
HOLD
RISE
FALL
DVBC
DVAC
DVBC
DVAC
1
2
3
4
5
6
7
8
9
10
11
12
PAZ
PZA
Symbol
Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified. (Note 2)
LOW
HIGH
Set Time - Data to Clock
Hold Time - Clock to Data
Rise Time
Fall Time
PCLK Low
PCLK High
Data Valid before Clock
Data Valid after Clock
WC Start Up Delay
WC Low Initialization Low
State
WC Pulse Width High
WC Low State
WC
(SER)
TBD
SER PLL Lock Time
MC Low Initialization Low
State
MC Pulse Width High
MC Low State
SER Latency
DES Latency
Disable Time to Power Off
Enable Time from Power
Off
IN
to WC
Parameter
OUT
Latency
Inputs
Outputs,
C
Figure 1
Figure 5
Planned Rev G ES test Chip will
double WC cyc counts on T
(SER) parameters to support higher
WC rates.
Figure 6
L
= 15 pF
Conditions
Figure 2
Figure 2
5
1
to T
4
TBD
TBD
TBD
TBD
Min
11
11
11
11
11
11
6
4,096
TBD
TBD
Typ
100
50
50
12
12
12
12
12
12
7
9
Max
13
13
13
13
13
13
8
www.national.com
WC
WC
WC
WC
WC
WC
MC
MC
MC
MC
MC
MC
Units
ns
ns
ns
ns
ns
ns
µs
µs
%
%
CYC
CYC
CYC
CYC
CYC
CYC
CYC
CYC
CYC
CYC
CYC
CYC

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