pi2eqx5804d Pericom Semiconductor Corporation, pi2eqx5804d Datasheet - Page 5

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pi2eqx5804d

Manufacturer Part Number
pi2eqx5804d
Description
5.0gbps 4-lane Pcie? 2.0 Redrivertm With Equalization & Emphasis
Manufacturer
Pericom Semiconductor Corporation
Datasheet

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Part Number:
pi2eqx5804dNJE
Manufacturer:
PERICOM
Quantity:
20 000
Description of Operation:
Configuration Modes
Device configuration can be performed in two ways depending on the state of the MODE input. MODE determines whether
IC configuration status is from the input pins or via I2C control. When MODE is set high, the configuration input pins set the
configuration operating state as stored in configuration registers. While MODE is set high, changes to these control registers are
disabled and the initial condition is protected from any changes to insuring a known operating state. When the MODE pin is low,
reprogramming of these control registers via I2C is allowed. Note that the MODE pin is not latched, and is always active to enable
or disable I2C access.
During initial power-on, the value at the configuration input pins: LB#, RESET#, PD#, RXD_A and RXD_B, DE_A, DE_B, SEL0_A,
SEL1_A, SEL2_A, D0_A, D1_A, D2_A, S0_A, S1_A, SEL0_B, SEL1_B, SEL2_B, D0_B, D1_B, D2_B, S0_B, S1_B, will be latched to
the configuration registers as initial startup states.
Equalizer Configuration
The PI2EQX5804D input equalizer compensates for signal attenuation and Inter-Symbol Interference (ISI) resulting from long
signal traces or cables, vias, signal crosstalk and other factors, by boosting the gain of high-frequency signal components. Because
either too little, or too much, signal compensation may be non-optimal eight levels are provided to adjust for any application.
Equalizer configuration is performed in two ways determined by the state of the MODE pin. When the device first powers up, the
SELx_[A:B] input pins are read into the appropriate control registers to set the equalization characteristic. If the MODE pin is low,
reprogramming of these control registers via I2C is allowed.
Each group of four channels, A and B, has separate equalization control, and all four channels within the group are assigned the
same configuration state. The Equalizer Selection table below describes pin strapping options and associated operation of the
equalizer. Refer to the section on I2C programming for information on software configuration of the equalizer.
Equalizer Selection
All trademarks are property of their respective owners.
0
0
0
0
1
1
1
1
SEL2_[A:B]
SEL1_[A:B]
0
0
1
1
0
0
1
1
5.0Gbps 4-Lane PCIe® 2.0 ReDriver™ with Equalization & Emphasis
SEL0_[A:B]
0
1
0
1
0
1
0
1
5
10-0170
@1.25GHz
0.5dB
0.6dB
1.0dB
1.9dB
2.8dB
3.6dB
5.0dB
7.7dB
www.pericom.com
@2.5GHz
1.2dB
1.5dB
2.6dB
4.3dB
5.8dB
7.1dB
9.0dB
12.3dB
PI2EQX5804D
P-0.1
05/28/10

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