cbtu4411 NXP Semiconductors, cbtu4411 Datasheet - Page 2

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cbtu4411

Manufacturer Part Number
cbtu4411
Description
Cbtu4411 11-bit Ddr2 Sdram Mux/bus Switch With 12 Ohm On-resistance
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
ORDERING INFORMATION
T
amb
Type number
CBTU4411EE
2006 Sep 22
Enable and select signals are SSTL_18 compatible
Optimized for use in Double Data Rate 2 (DDR2) SDRAM
applications
Designed to be used with 400 to 667 Mbps/200 to 333 MHz DDR2
data bus
Switch on resistance is designed to eliminate the need for series
resistor to DDR2 SDRAM
12
Controlled enable/disable times support fast bus turnaround
Pseudo-differential select inputs support accurate and low–skew
control of switching times
Selectable built-in termination resistors on the Sn inputs
Internal 400
V
Configurable to support differential strobe with pull-up to
V
Low differential skew
Matched rise/fall slew rate
Low cross-talk data-data/data-DQM
Simplified 1:4 switch position control by 2-bit encoded input
Single input pin puts all bus switches in off (high-Z) position
Latch-up protection exceeds 500 mA per JESD78
ESD protection exceeds 1500 V HBM per JESD22-A114,
200 V MM per JESD22-A115, and 750 V CDM per JESD22-C101
11-bit DDR2 SDRAM mux/bus switch
with 12
BIAS
DD
SYMBOL
= 0 C to +85 C
t
t
C
C
I
on Channel 10 when idle
PLH
PHL
DD
on resistance
ON
IN
input for optimal DIMM-port pull-down when disabled
pull-down resistors on B port
Propagation delay
Host to DIMM or v.v.
Input capacitance – control pins
Channel on capacitance
Quiescent supply current
on-resistance
Topside mark
PARAMETER
Package
Name
LFBGA72
Description
body 7
Figures 5, 7; V
V
V
V
plastic low profile fine-pitch ball grid array package; 72 balls;
3
I
in
DD
/
= 0 V or V
4
= 0.9 V
of
= 1.8 V; I
7
1.05 mm
DD
2
O
DD
T
= 0; V
amb
DESCRIPTION
This 11-bit bus switch is designed for 1.7 V to 1.9 V V
and SSTL_18 select input levels.
Each Host port pin is multiplexed to one of four DIMM port pins. The
selection of the DIMM port to be connected to the Host port is
controlled by a decoder driven by 3 hardware select pins, S[1:0] and
EN. Driving pin EN HIGH disconnects all DIMM ports from their
respective host ports. When EN is driven LOW, pins S0 and S1
select one of four DIMM ports to be connected to their respective
host port. When disconnected, any DIMM port is terminated to the
externally supplied voltage V
resistor of typically 400 . The on-state connects the Host port to
the DIMM port through a 12
is intended to have only one DIMM port active at any time.
The CBTU4411 can also be configured to support a differential
strobe signal on channels 10 (TRUE) and 9 (complementary
Strobe). When its LVCMOS configuration input STRobe ENable is
HIGH, Channel 10 is pulled up to
divider when the DIMM port is idle. When the CBTU4411 is disabled
(EN = HIGH in Strobe mode, the pull-down on Channel 10 is
disabled for current savings, pulling Channel 10 to V
STRobe ENable is LOW, Channel 10 behaves the same as all other
channels.
The select inputs (S0, S1) are pseudo-differential type SSTL_18. A
reference voltage should be provided to input pin V
V
reducing dependency on select signal slew rates. S0 and S1 are
provided with selectable input termination to V
LVCMOS input TERM is HIGH). When the CBTU4411 is disabled
(EN = HIGH), both S0 and S1 inputs are pulled LOW.
The part incorporates a very low cross-talk design. It has a very low
skew between outputs (< 30 ps) and low skew (< 30 ps) for rising
and falling edges. The part has optimal performance in DDR2 data
bus applications.
Each switch has been optimized for connection to 1 or 2-rank
DIMMs.
The low internal RC time constant of the switch allows data transfer
to be made with minimal propagation delay.
The CBTU4411 is characterized for operation from 0 C to +85 C.
= 1.8 V; input slew rate = 2.5 V/ns
DD
CONDITIONS
= 25 C; GND = 0 V
/2. This topology provides accurate control of switching times by
I
= V
DD
or GND
BIAS
nominal series resistance. The design
by means of an on-chip pull-down
3
/
4
of V
DD
internally by a resistive
TYPICAL
CBTU4411
DD
50
Product data sheet
/2 (active when
3
4
6
REF
DD
DD
. When
at nominally
Version
SOT856-1
operation
UNIT
mA
pF
pF
ps

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