ncn6001 ON Semiconductor, ncn6001 Datasheet - Page 26

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ncn6001

Manufacturer Part Number
ncn6001
Description
Compact Smart Card Interface Ic
Manufacturer
ON Semiconductor
Datasheet

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upon the specific application, prior to be applied to the smart
card driver. On the other hand, the positive and negative
going slopes of the output clock (CRD_CLK) can be
programmed to optimize the operation of the chip
Table 10. Output Clock Rise and Fall Time Selection
The input clock can be divided by 1/1, ½ or ¼, depending
B0
0
0
1
1
Figure 28. CRD_CLK Programming
Figure 26. Force CRD_CLK to Low
B1
0
1
0
1
Division Ratio
CRD_CLK
1/2
1/4
1
http://onsemi.com
Output Clock = Low
NCN6001
10 ns (typ.)
10 ns (typ.)
10 ns (typ.)
CRD_CLK
SLO_SLP
26
Figure 29. CRD_CLK Operating Low Speed (Top Trace),
(Table 10). The slope of the output clock can be
programmed on the fly, independently of either the
CRD_VCC voltage or the operating frequency, but care
must be observed as the CRD_RST will reflect the logic
state present at MOSI/b4 register.
Note: Waveforms recorded without external compensation
Figure 27. Force CRD_CLK to Active Mode
network.
Full Speed (Bottom Trace)
Output Clock = Low
CRD_CLK
FST_SLP
2 ns (typ.)
2 ns (typ.)
2 ns (typ.)

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