w83627ehf Winbond Electronics Corp America, w83627ehf Datasheet - Page 123

• Manufacturer Part Number: w83627ehf
• Description: W83627ehf/ef W83627ehg/eg Winbond Lpc I/o
• Manufacturer: Winbond Electronics Corp America

CR E5h. (Reserved)
CR E6h. (Default 1Ch)
CR E7h. (Default 00h)
2~1
BIT
7~0
BIT
BIT
7
6 Reserved.
5
4
3
0
7
R / W-Clear
READ /
WRITE
Reserved.
READ / WRITE
READ / WRITE
R / W
R / W
R / W
R / W
R / W
R / W
ENMDAT =>
3 keys (ENMDAT_UP, CRE6[7]; MSRKEY, CRE0[4]; MSXKEY, CRE0[1])
define the combinations of the mouse wake-up events. Please check out the
table in CRE0[4] for the detailed.
CASEOPEN Clear Control.
Write 1 to this bit will clear CASEOPEN status.
please write 0 after event be cleared. The function is as same as Index 46h bit
7 of H/W Monitor part.
Power loss Last State Flag. (VBAT)
0: ON
1: OFF.
PWROK_DEL (first stage)
Set the delay rising time from PWROK_LP to PWROK_ST.
0: 300 ~ 600 ms.
1: 200 ~ 300 ms.
PWROK_DEL
Set the delay rising time from PWROK_ST to POWEROK.
00: No delay time.
10: 96 ms
PWROK_TRIG =>
Write 1 to re-trigger POWEROK signals from low to high.
ENKD3 =>
Enable the third set of keyboard wake-up key combination. Its values are
accessed through keyboard wake-up index register (CRE1) and keyboard
wake-up data register (CRE2) at the index from 40h to 4eh.
0: Disable the third set of the key combinations.
1: Enable the third set of the key combinations.
(VSB)
(VSB)
(VSB)
W83627EHF/EF, W83627EHG/EG
(VSB)
(VSB)
-117-
01: Delay 32 ms
11: Delay 250 ms
DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: January 18, 2006
This bit won’t be self cleared,
Revision 1.0