sak-c164ci-l16m3v Infineon Technologies Corporation, sak-c164ci-l16m3v Datasheet - Page 59
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sak-c164ci-l16m3v
Manufacturer Part Number
sak-c164ci-l16m3v
Description
16-bit Single-chip Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.SAK-C164CI-L16M3V.pdf
(75 pages)
- Current page: 59 of 75
- Download datasheet (2Mb)
Preliminary
Memory Cycle Variables
The timing tables below use three variables which are derived from the BUSCONx
registers and represent the special characteristics of the programmed memory cycle.
The following table describes, how these variables are to be computed.
Table 15
Description
ALE Extension
Memory Cycle Time Waitstates
Memory Tristate Time
Note: Please respect the maximum operating frequency of the respective derivative.
AC Characteristics
Multiplexed Bus
(Operating Conditions apply)
ALE cycle time = 6 TCL + 2
Parameter
ALE high time
Address setup to ALE
Address hold after ALE
ALE falling edge to RD,
WR (with RW-delay)
ALE falling edge to RD,
WR (no RW-delay)
Address float after RD,
WR (with RW-delay)
Address float after RD,
WR (no RW-delay)
RD, WR low time
(with RW-delay)
Data Sheet
Memory Cycle Variables
t
A
Symbol
t
t
t
t
t
t
t
t
5
6
7
8
9
10
11
12
+
t
C
CC 17 +
CC 11 +
CC 21 +
CC 21 +
CC -10 +
CC –
CC –
CC 46 +
+
Symbol
t
t
t
t
A
C
F
F
(187.5 ns at 16 MHz CPU clock without waitstates)
min.
Max. CPU Clock
= 16 MHz
t
t
t
t
t
55
A
A
A
C
A
t
A
TCL
2TCL
2TCL
Values
max.
–
–
–
–
–
6
37
–
<ALECTL>
(15 - <MCTC>)
(1 - <MTTC>)
1 / 2TCL = 1 to 16 MHz
min.
TCL - 14
+
TCL - 20
+
TCL - 10
+
TCL - 10
+
-10 +
–
–
2TCL - 16
+
Variable CPU Clock
t
t
t
t
t
A
A
A
A
C
t
A
C164CI-L16M3V
max.
–
–
–
–
–
6
TCL + 6
–
Low Power
V1.0, 2003-01
Unit
ns
ns
ns
ns
ns
ns
ns
ns
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