sak-cic310-osmx2ht Infineon Technologies Corporation, sak-cic310-osmx2ht Datasheet - Page 12

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sak-cic310-osmx2ht

Manufacturer Part Number
sak-cic310-osmx2ht
Description
Flexray Communication Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
Figure 3
2.3
The third option is to connect the SAK-CIC310-OSMX2HT via the parallel interface e.g.
the AUDO-NG 32-bit microcontroller family or the (X)C166 16-bit microcontroller family.
The parallel interface provides enough bandwidth to handle the maximum data traffic
generated by the SAK-CIC310-OSMX2HT FlexRay Protocol Controller to the AUDO-NG
32-bit microcontroller device and vice versa.
XMU Features
Data Sheet
16-bit wide data bus (D[15:0])
– Data width of external bus master can be 8 or 16 bit.
– Automatic data assembly/disassembly operation
13-bit wide address bus (A[12:0])
Bus control signals
– Read (RD) and write (WR)
– Two byte control signals (BC[1:0])
– External synchronous/asynchronous wait state control (WAIT)
– External master chip select (CSFPI) to access on-chip devices connected to the
MIF Bus
Parallel Host Link (Option Three)
SAK-CIC310-OSMX2HT and AUDO-NG 32bit Microcontroller Device
Connected via ASC
IFLEX
IFLEX
SSC
SSC
MRST and
MRST
MTSR
SCLK
SCLK
MTSR
PORST (RESET)
PORST (RESET)
chip select
chip select
direction
13
BUSY
BUSY
RXDxB or
TXDxA or
TXDxA or
RXDxB or
RXDxA or
RXDxA
TXDxB
TXDxB
RXDxA
RXDxB
AUDO-NG 32-bit
microcontrollers
AUDO-NG 32-bit
microcontrollers
ASC
ASC
SAK-CIC310-OSMX2HT
Functional Description
SYSTEM_ASC
V 2.2, 2007-06
IFLEX

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