lmh1982sqx National Semiconductor Corporation, lmh1982sqx Datasheet - Page 25
lmh1982sqx
Manufacturer Part Number
lmh1982sqx
Description
Lmh1982 Multi-rate Video Clock Generator With Genlock
Manufacturer
National Semiconductor Corporation
Datasheet
1.LMH1982SQX.pdf
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9.0 I
TABLE 8. I
When writing to registers containing reserved bits (RSV), make sure the RSV bits are programmed with their original default data shown in column 2 of Table
8; otherwise, improper device operation may result.
Register
Address
0Ah
0Bh
0Ch
0Dh
0Eh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Fh
10h
11h
12h
13h
14h
2
C INTERFACE CONTROL REGISTER DEFINITIONS
Default
Data
A3h
B4h
B4h
0Dh
0Dh
86h
00h
01h
06h
00h
00h
04h
01h
00h
06h
02h
02h
00h
00h
88h
88h
2
C Interface Control Register Map
GNLK_I
EN_TOF_
RSV
RSV
RSV
RSV
RSV
RST
RSV
D7
0
0
0
0
0
2
C
POL_TOF
GNLK
RSV
RSV
RSV
RSV
RSV
RSV
D6
0
0
0
0
0
ICP2 [7:4]
LOCK_CTRL [7:3]
RSEL_I
TOF_INIT
TOF_CLK
TOF_HIZ
OVRD
PIN6_
RSV
RSV
RSV
RSV
D5
0
0
0
0
2
C
REF_27
HD_HIZ
RSEL
RSV
RSV
RSV
25
D4
0
0
0
TOF_OFFSET [7:0]
TOF_LPFM [7:0]
REF_LPFM [7:0]
TOF_RST [7:0]
TOF_PPL [7:0]
FB_DIV [7:0]
POL_HA
HOLD-
OVER
RSV
RSV
HD_FREQ [3:2]
D3
TOF_RST [12:8]
TOF_PPL [12:8]
FB_DIV [12:8]
HD_LOCK
POL_VA
ICP1 [4:0]
TOF_OFFSET [11:8]
RSV
RSV
D2
TOF_LPFM [11:8]
REF_LPFM [11:8]
ICP4 [3:0]
ICP3 [3:0]
H_ERROR [2:0]
SD_LOCK
POL_HB
SD_HIZ
REF_DIV_SEL [1:0]
RSV
D1
REF_VALID
SD_FREQ
POL_VB
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RSV
D0
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