sc14wsmdata Dialog Semiconductor, sc14wsmdata Datasheet - Page 13

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sc14wsmdata

Manufacturer Part Number
sc14wsmdata
Description
Ultra Low Energy Wireless Sensor Module V1.0
Manufacturer
Dialog Semiconductor
Datasheet
© 2011 Dialog Semiconductor B.V/
4.0 Functional description
4.1 INTERFACE DESCRIPTION
The following sections describe the various interfacing
options. See Figure 8 for a typical example how to
connect these interfaces. All interfaces can be
controlled through the Hardware Abstraction Layer
(HAL) features of the AT command set (see [1]).
drivers. It is not allowed to have a high signal (1.8V/
3.3V) connected to the pads during sleep as (large)
leakage currents will flow.
The following practical recommendations are made for
a design with the SC14WSMDATA module:
• High signals during sleep on the ports can be
• If external components must be active/supplied
4.1.1
Figure 5 shows the power control of the
SC14WSMDATA module. The ULE block and the RF
Power Amplifier are fed directly from the battery and
consume very little standby current during sleep.
During sleep the switch connecting B10 (VBAT) and
C11 (VBATSW) is open, meaning the power supply to
the microprocessor and other blocks is disconnected. It
is important that the RF Power Amplifier is fed directly
from the battery as the peak currents during TX mode
are relatively high (around 550mA) and voltage drops
due to parasitic resistance should be avoided.
When going to active state the ULE block will switch on
the power, meaning VBATSW (C11) will be connected
to the battery. The fact that the connection to the
battery is switched is why the pin C11 is called VBAT
Switched or VBATSW. The radio is internally
connected to VBATSW. The microprocessor gets its
power from point A9 (connected to VBATSW/C11) and
some power domains in the microprocessor are fed
from an internal LDO (also connected to VBATSW)
providing 1.8V. The QSPI FLASH on the module is
connected to the internal LDO (1.8V) through D10
(1.8V out) and A5 (QSPI FLASH voltage in). Due to the
fact that the high current drive ports P3[0]/C2 and
P3[1]/D2 can carry a significant amount of current
avoided by making the SC14WSMDATA module the
power management master in the system. External
components can be supplied by supplies that are
only active during the module active mode. This
means either the switched VBAT (VBATSW), the
VDD output (1.8V output) or the Charge Pump
output (CP_VOUT).
during the sleep mode of the module it is
recommended to place a buffer (such as a
74AHC1G04GW/T1) in between the external
component and the GPIO port in question. The
buffer VCC can be switched off during sleep (using
the power outputs on the SC14WSMDATA module)
which effectively disconnects the I/O line.
Note: all interfacing ports (except the
ULE_PORT) are connected to GND during sleep
due to the ESD protection circuits in the pad
Power control
Company Confidential
13
(500mA) the power supply of the high current drive
ports is connected externally through E1 (connected to
VBATSW).
.
4.1.2
The SC14WSMDATA module has a total of 8 free to
use GPIO ports. Two of these ports (P3[0] and P3[1])
are output only high output drive capability (500mA)
and can support 1.8V and 3.3V interfacing. The inter-
facing level is determined by the high output drive port
supply voltage on the VDDPA (E1) pin.
The other six (P3[2-7]) support normal output drive (4/
8mA) and input with 1.8V interfacing. If high output
drive is not necessary it is recommended to use the
P3[2-7] ports to minimize power consumption.
4.1.3
Two current controlled LED drivers are available to
connect LED’s without resistors.
4.1.4
Two 10-bit successive approximation Analog Digital
Converters are available. Both converters have a
selectable input range (0-0.9V or 0-1.8V) and 55 us
conversion time.
4.1.5
The ULE Port can be configured as either an input or
output. Configured as output, the ULE port is the only
port on the WSMDATA module that will retain its active
high state during sleep. If the ULE port is configured as
an output, the system can only be woken up by the
Wake up Timer. As an input, the ULE port can wake up
the system based on an external trigger.
This port has a debounce filter and level change must
remain at least for a 200 us period.
Through the HAL API the port trigger can be configured
to be:
Batteries:
- 2xAA
- 2xAAA
- CR2
- ...
Figure 5 SC14WSMDATA Power control
GPIO
LED
ADC
ULE Port
Power
amplifier
ULE
Radio
SC14WSMDATA
Preliminary December 4, 2012 v1.0
uC
LDO
FLASH
QSPI
P3[0]
P3[1]
ports

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