nvt2003 NXP Semiconductors, nvt2003 Datasheet - Page 10
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nvt2003
Manufacturer Part Number
nvt2003
Description
Bidirectional Voltage-level Translator For Open-drain And Push-pull Applications
Manufacturer
NXP Semiconductors
Datasheet
1.NVT2003.pdf
(28 pages)
NXP Semiconductors
Table 5.
Calculated for V
[1]
NVT2003_04_06
Product data sheet
V
5 V
3.3 V
2.5 V
1.8 V
1.5 V
1.2 V
pu(D)
+10 % to compensate for V
Nominal
Pull-up resistor values
OL
7.4.1 Maximum frequency calculation
64 mA
= 0.35 V; assumes output driver V
+10 %
must be able to sink the total current from the resistors on both sides of the NVT20xx
device at 0.175 V, although the 15 mA only applies to current flowing through the
NVT20xx device.
The maximum frequency is totally dependent upon the specifics of the application and the
device can operate > 33 MHz. Basically, the NVT20xx behaves like a wire with the
additional characteristics of transistor device physics and should be capable of performing
at higher frequencies if used correctly.
Here are some guidelines to follow that will help maximize the performance of the device:
In a 3.3 V to 1.8 V direction level shift, if the 3.3 V side is being driven by a totem pole type
driver no pull-up resistor is needed on the 3.3 V side. The capacitance and line length of
concern is on the 1.8 V side since it is driven through the ON resistance of the NVT20xx.
If the line length on the 1.8 V side is long enough there can be a reflection at the
chip/terminating end of the wire when the transition time is shorter than the time of flight of
the wire because the NVT20xx looks like a high-impedance compared to the wire. If the
wire is not too long and the lumped capacitance is not excessive the signal will only be
slightly degraded by the series resistance added by passing through the NVT20xx. If the
lumped capacitance is large the rise time will deteriorate, the fall time is much less
affected and if the rise time is slowed down too much the duty cycle of the clock will be
degraded and at some point the clock will no longer be useful. So the principle design
consideration is to minimize the wire length and the capacitance on the 1.8 V side for the
clock path. A pull-up resistor on the 1.8 V side can also be used to trade a slower fall time
for a faster rise time and can also reduce the overshoot in some cases.
•
•
•
•
[1]
CC
Keep trace length to a minimum by placing the NVT20xx close to the processor.
The trace length should have a time of flight less than half of the transition time to
reduce ringing and reflections.
The faster the edge of the signal, the higher the chance for ringing.
The higher the drive strength (up to 15 mA), the higher the frequency the device can
use.
range and resistor tolerance.
Nominal
32 mA
All information provided in this document is subject to legal disclaimers.
+10 %
Rev. 2 — 29 March 2011
[1]
OL
Pull-up resistor value ()
= 0.175 V at stated current.
Nominal
310
197
143
97
77
57
15 mA
+10 %
341
217
158
106
85
63
[1]
Nominal
Bidirectional voltage-level translator
465
295
215
145
115
85
10 mA
NVT2003/04/06
+10 %
512
325
237
160
127
94
[1]
Nominal
© NXP B.V. 2011. All rights reserved.
1550
983
717
483
383
283
3 mA
+10 %
1705
1082
532
312
788
422
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