24lcs21 Microchip Technology Inc., 24lcs21 Datasheet - Page 3

• Manufacturer Part Number: 24lcs21
• Description: 1k 2.5v Dual Mode I 2 C? Serial Eeprom
• Manufacturer: Microchip Technology Inc.

TABLE 1-2:
© 2005 Microchip Technology Inc.
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
SDA and SCL fall time
Start condition hold time
Start condition setup time
Data input hold time
Data input setup time
Stop condition setup time
Output valid from clock
Bus free time
Output fall time from V
minimum to V
Input filter spike suppression
(SDA and SCL pins)
Write cycle time
Transmit-Only Mode Parameters
Output valid from V
V
V
V
V
Mode transition time
Transmit-only power-up time
Input filter spike suppression
(V
Endurance
Note 1:
CLK
CLK
CLK
CLK
CLK
high time
low time
setup time
hold time
2:
3:
4:
pin)
Parameter
Not 100% tested. C
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
The combined T
spike suppression. This eliminates the need for a T
This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance
at www.microchip.com.
IL
maximum
AC CHARACTERISTICS
CLK
IH
SP
and V
Symbol
T
T
T
T
T
B
T
T
T
T
T
SU
SU
SU
T
HD
HD
F
T
T
T
T
T
VHIGH
T
= total capacitance of one bus line in pF.
VLOW
T
T
T
VHST
SPVL
HIGH
LOW
T
T
SPV
BUF
VAA
VHZ
VPU
—
CLK
WR
AA
OF
SP
:
:
:
:
:
R
F
STA
DAT
STO
STA
DAT
HYS
specifications are due to Schmitt Trigger inputs which provide noise and
V
4000
4700
4000
4700
4000
4700
4000
4700
4000
Min
250
CC
1M
—
—
—
—
—
—
—
—
—
0
0
0
0
= 2.5-5.5V
1000
3500
2000
Max
100
300
250
100
500
100
—
—
—
—
—
—
—
—
10
—
—
—
—
—
—
™
20 + 0.1
Model which can be obtained from Microchip’s web site
V
1300
1300
1300
I
Min
600
600
600
100
600
600
600
CC
1M
C
—
—
—
—
—
—
—
—
specification for standard operation.
0
0
0
0
B
= 4.5-5.5V
1000
Max
400
300
300
900
250
500
100
—
—
—
—
—
—
—
—
50
10
—
—
—
—
—
—
cycles
Units
kHz
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
After this period the first
clock pulse is generated
Only relevant for repeated
Start condition
(Note 2)
(Note 2)
Time the bus must be free
before a new transmission
can start
(Note 1), C
(Note 3)
Byte or Page mode
25°C, V
mode (Note 4)
24LCS21
CC
Remarks
= 5.0V, Block
B
DS21127F-page 3
100 pF