at24c16c-xhm-t ATMEL Corporation, at24c16c-xhm-t Datasheet - Page 6

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at24c16c-xhm-t

Manufacturer Part Number
at24c16c-xhm-t
Description
Two-wire Serial Electrically Erasable And Programmable Read-only Memory
Manufacturer
ATMEL Corporation
Datasheet

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Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA
pin may change only during SCL low time periods (see <blue>Figure 3-4 on page 7). Data changes during SCL
high periods will indicate a start or stop condition as defined below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which must precede any
other command (see <blue>Figure 3-5 on page 8).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the
stop command will place the EEPROM in a standby power mode (see <blue>Figure 3-5 on page 8).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words.
The EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock
cycle.
STANDBY MODE: The Atmel
(a) upon power-up and (b) after the receipt of the STOP bit and the completion of any internal operations.
2-WIRE SOFTWARE RESET: After an interruption in protocol, power loss or system reset, any 2-wire part can be
protocol reset by following these steps:
Figure 3-1.
1. Create a start bit condition
2. Clock nine cycles
3. Create another start bit followed by stop bit condition as shown below
Atmel AT24C16C
SDA
SCL
Software Reset
Start bit
®
1
AT24C16C features a low-power standby mode which is enabled:
2
Dummy Clock Cycles
3
8
9
Start bit
8719A–SEEPR–9/10
Stop bit

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