at25df161 ATMEL Corporation, at25df161 Datasheet - Page 14

• Manufacturer Part Number: at25df161
• Description: 16-megabit 2.7-volt Minimum Spi Serial Flash Memory
• Manufacturer: ATMEL Corporation

14
AT25DF161 [Preliminary]
be programmed will apply. In this situation, any data that is sent to the device that goes beyond
the end of the page will wrap around back to the beginning of the same page. For example, if the
starting address denoted by A23-A0 is 0000FEh, and three bytes of data are sent to the device,
then the first two bytes of data will be programmed at addresses 0000FEh and 0000FFh while
the last byte of data will be programmed at address 000000h. The remaining bytes in the page
(addresses 000001h through 0000FDh) will not be programmed and will remain in the erased
state (FFh). In addition, if more than 256 bytes of data are sent to the device, then only the last
256 bytes sent will be latched into the internal buffer.
When the CS pin is deasserted, the device will take the data stored in the internal buffer and pro-
gram it into the appropriate memory array locations based on the starting address specified by
A23-A0 and the number of data bytes sent to the device. If less than 256 bytes of data were sent
to the device, then the remaining bytes within the page will not be programmed and will remain
in the erased state (FFh). The programming of the data bytes is internally self-timed and should
take place in a time of t
The three address bytes and at least one complete byte of data must be clocked into the device
before the CS pin is deasserted, and the CS pin must be deasserted on even byte boundaries
(multiples of eight bits); otherwise, the device will abort the operation and no data will be pro-
grammed into the memory array. In addition, if the address specified by A23-A0 points to a
memory location within a sector that is in the protected state (see
or locked down (see
not be executed, and the device will return to the idle state once the CS pin has been deas-
serted. The WEL bit in the Status Register will be reset back to the logical “0” state if the
program cycle aborts due to an incomplete address being sent, an incomplete byte of data being
sent, the CS pin being deasserted on uneven byte boundaries, or because the memory location
to be programmed is protected or locked down.
While the device is programming, the Status Register can be read and will indicate that the
device is busy. For faster throughput, it is recommended that the Status Register be polled
rather than waiting the t
At some point before the program cycle completes, the WEL bit in the Status Register will be
reset back to the logical “0” state.
The device also incorporates an intelligent programming algorithm that can detect when a byte
location fails to program properly. If a programming error arises, it will be indicated by the EPE
bit in the Status Register.
Figure 8-3.
SCK
SOI
CS
SI
Dual-Input Byte Program
“Sector Lockdown” on page
MSB
HIGH-IMPEDANCE
1
PP
0
BP
0
or t
1
or t
1
2
OPCODE
BP
PP
0
3
if only programming a single byte.
time to determine if the data bytes have finished programming.
0
4
0
5
1
6
0
7
MSB
A
8
A
9
ADDRESS BITS A23-A0
A
29), then the Byte/Page Program command will
10 11
A
A
12
A
A
29 30
A
“Protect Sector” on page
A
31 32
MSB
D 6
D 7
DATA BYTE
INPUT
D 4
D 5
33
D 2
D 3
34
D 0
D 1
35
3687B–DFLASH–11/08
22)