at88sc018 ATMEL Corporation, at88sc018 Datasheet - Page 14

• Manufacturer Part Number: at88sc018
• Description: Cryptocompanion? Chip For Cryptomemory And Cryptorf
• Manufacturer: ATMEL Corporation

1.6.
1.6.1. Environmental Detectors
1.6.2. Reset Protection & Power Delay
14
Security Features
The AT88SC018 contains an over and under voltage detector for V
unknown startup states. If this detector is triggered, the AT88SC018 will be held in reset until the condition is cleared.
The operating clock is internally generated independent of SDA & SCL, and glitches on those pins are filtered out. The
AT88SC018 includes a metal obfuscation pattern over the memory block.
There is a reset protection register in EEPROM (RstProt) that normally has a value of 1 before power is applied. On
reset, the AT88SC018 writes this register in the EEPROM to a value of 0, and starts a counter. That counter counts
1 MHz clocks up to a total delay interval of approximately 67 seconds, and at that time the AT88SC018 writes the
protection register to a value of 1. If a command is in progress when this time interval is reached, the register will be
updated at the completion of the command. After this write, the reset protection circuit goes idle until the next reset.
If at the time of reset or power-up the protection register already has a value of 0, then the AT88SC018 goes into a
“Power Delay” state for the same amount of time during which it will neither accept nor acknowledge any command. At
the end of the time interval, it will reset the register to a value of 1 and resume normal operation. A power-up or pin
reset during the “Power Delay” interval will restart the delay counter and start a new interval during which commands
will be ignored.
The AT88SC018 is designed to permit the system to execute the reset operation (and operate for at least 67 seconds)
a minimum of 1 million times. If the part is continuously reset every 67 seconds, this limit will be reached in about
2 years.
The Power Delay of 67 seconds is the maximum delay that the AT88SC018 can support. The actual delay is derived
from the contents PwrDelay byte within the EEPROM, according to the following table. The measured delay will vary by
up to +/- 25% over manufacturing and operating conditions.
Table 13.
Note:
The reset protection circuit and associated power delay operates regardless of whether the AT88SC018 is locked or
unlocked.
Failure to meet Power up and Power down conditions listed in
state, causing a “Power Delay” interval.
CryptoCompanion Chip
PwrDelay
Other
0x00
0x01
0x02
0x04
0x08
Short power delay times may decrease the overall security of the system.
Reset Protection & Power Delay
Nominal Delay Interval
Unpredictable
262ms
524ms
785ms
1.3s
2.4s
PwrDelay
0xFF
0x10
0x20
0x40
0x80
Section 1.4.1.1
CC
and includes a POR detector to prevent any
Nominal Delay Interval
may result in invoking a reset protection
4.5s
8.7s
17s
34s
67s
5277C–CryptoCompanion–9/09