is42s16160a1-7t Integrated Silicon Solution, Inc., is42s16160a1-7t Datasheet - Page 19

Manufacturer Part Number

is42s16160a1-7t

Description

256 Mb Synchronous Dram

Manufacturer

Integrated Silicon Solution, Inc.

Datasheet

1.IS42S16160A1-7T.pdf (49 pages)

IS42S83200A1

IS42S16160A1

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. B

10/28/05

[ Read Interrupted by Precharge ]

Burst read operation can be interrupted by precharge

of the same bank . READ to PRE interval is minimum 1

CLK. A PRE command to output disable latency is

C L=2

C L=3

Command

(4-bank x 8,388,608 - word x 8-bit)

(4-bank x 4,194,304 - word x 16-bit)

CLK

READ

Read interrupted by Precharge (BL=4)

PRE

equivalent to the /CAS Latency. As a result, READ to

PRE interval determines valid data length to be output.

The figure below shows examples of BL=4.

PRE

ISSI