is42s16160a1-7t Integrated Silicon Solution, Inc., is42s16160a1-7t Datasheet - Page 4

• Manufacturer Part Number: is42s16160a1-7t
• Description: 256 Mb Synchronous Dram
• Manufacturer: Integrated Silicon Solution, Inc.

IS42S83200A1
IS42S16160A1
4
PIN FUNCTION
/RAS, /CAS, /WE
VddQ, VssQ
DQ0-7(x8),
DQ0-15(x16)
DQM(x8),
DQMU/L(x16)
Vdd, Vss
A0-12
BA0,1
CKE
CLK
/CS
(4-bank x 8,388,608 - word x 8-bit)
(4-bank x 4,194,304 - word x 16-bit)
Power Supply
Power Supply
Input / Output
Input
Input
Input
Input
Input
Input
Input
VddQ and VssQ are supplied to the Output Buffers only.
Power Supply for the memory array and peripheral circuitry.
Master Clock:
Clock Enable:
CKE controls internal clock.When CKE is low, internal clock for
the following cycle is ceased. CKE is also used to select
auto / self-refresh.
After self-refresh mode is started, CKE becomes asynchronous input.
Self-refresh is maintained as long as CKE is low.
A0-12 specify the Row / Column Address in conjunction with BA0,1.
The Row Address is specified by A0-12.
The Column Address is specified by A0-9(x8)/A0-8(x16).
A10 is also used to indicate precharge option. When A10 is high at a
read / write command, an auto precharge is performed. When A10 is
high at a precharge command, all banks are precharged.
Bank Address:
BA0,1 specifies one of four banks to which a command is applied.
BA0,1 must be set with ACT, PRE , READ , WRITE commands.
All other inputs are referenced to the rising edge of CLK
Data In and Data out are referenced to the rising edge of CLK.
Din Mask / Output Disable:
When DQM(U/L) is high in burst write, Din for the current cycle is
masked. When DQM(U/L) is high in burst read,
Dout is disabled at the next but one cycle.
When /CS is high, any command means No Operation.
Combination of /RAS, /CAS, /WE defines basic commands.
Chip Select:
Integrated Silicon Solution, Inc. — 1-800-379-4774
ISSI
10/28/05
Rev. B
®