is43dr16640a-3dbi Integrated Silicon Solution, Inc., is43dr16640a-3dbi Datasheet - Page 15
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is43dr16640a-3dbi
Manufacturer Part Number
is43dr16640a-3dbi
Description
1gb X8, X16 Ddr2 Sdram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
1.IS43DR16640A-3DBI.pdf
(28 pages)
IS43DR81280A, IS43/46DR16640A
Single‐ended AC Input logic level
Note: Refer to Overshoot and Undershoot Specification for Vpeak value: maximum peak amplitude allowed for overshoot and undershoot.
AC Input Test Conditions
Notes:
1.
2.
3.
AC Input Test Signal Waveform
Differential Input AC logic level
Notes:
1.
2.
Integrated Silicon Solution, Inc. – www.issi.com –
Rev. 00A, 12/11/2009
Symbol
VREF
VREF
SLEW
Symbol
VID(AC)
VIX(AC)
Input waveform timing is referenced to the input signal crossing through the VIH/IL(AC) level applied to the device under test.
The input signal minimum slew rate is to be maintained over the range from VREF to VIH(AC) min for rising edges and the range from VREF to VIL(AC) max for
falling edges as shown in the below figure.
AC timings are referenced with input waveforms switching from VIL(AC) to VIH(AC) on the positive transitions and VIH(AC) to VIL(AC) on the negative transitions.
VID(AC) specifies the input differential voltage |VTR ‐VCP | required for switching, where VTR is the true input signal (such as CK, DQS, LDQS or UDQS) and VCP
is the complementary input signal (such as CK#, DQS#, LDQS# or UDQS#). The minimum value is equal to V IH(AC) ‐ V IL(AC).
The typical value of VIX(AC) is expected to be about 0.5 x VDDQ of the transmitting device and VIX(AC) is expected to track variations in VDDQ. VIX(AC) indicates
the voltage at which differential input signals must cross.
VIH(AC)
Symbol
VIL(AC)
V
AC differential crosspoint voltage
Falling Slew =
SWING(MAX)
AC differential input voltage
Input signal maximum peak to peak swing
Parameter
AC input logic HIGH
AC input logic LOW
Input signal minimum slew rate
Parameter
Input reference voltage
ΔTF
V
REF
Condition
- V
ΔTF
IL(ac)
0.5 x VDDQ‐0.175
max
VSSQ ‐ Vpeak
VREF + 0.250
Min.
0.5
DDR2‐533,667, 800
Min.
DDR2‐533
0.5 x VDDQ+0.175
VDDQ + Vpeak
VREF ‐ 0.250
VDDQ
Max.
Rising Slew =
Max.
ΔTR
0.5 x VDDQ
0.5 x VDDQ‐0.175
Value
1.0
1.0
VSSQ ‐ Vpeak
VREF + 0.200
Min.
0.5
V
Min.
DDR2‐667, 800, 1066
IH(ac)
DDR2‐ 1066
V
V
V
V
V
V
V
min - V
ΔTR
DDQ
IH(ac)
IH(dc)
REF
IL(dc)
IL(ac)
SS
0.5 x VDDQ+0.175
VDDQ+0.6
VDDQ + Vpeak
max
max
VREF ‐ 0.200
REF
min
min
Max.
Max.
Units
V/ns
V
V
Units
V
V
Notes
2, 3
Units
1
1
Notes
V
V
1, 3
15
2