is43dr16640a-3dbi Integrated Silicon Solution, Inc., is43dr16640a-3dbi Datasheet - Page 8

• Manufacturer Part Number: is43dr16640a-3dbi
• Description: 1gb X8, X16 Ddr2 Sdram
• Manufacturer: Integrated Silicon Solution, Inc.

IS43DR81280A, IS43/46DR16640A
contents can be changed using the same command and clock cycle requirements during normal operation as long as all banks are in
precharge state.
Extended Mode Register 2 (EMR[2]) Diagram
Notes:
1.
2.
3.
DDR2 Extended Mode Register 3 (EMR[3]) Setting
No function is defined in extended mode register 3. The default value of the extended mode register 3 is not defined. Therefore, the
extended mode register 3 must be programmed during initialization for proper operation.
DDR2 Extended Mode Register 3 (EMR[3]) Diagram
Note: All bits in EMR[3] except BA0 and BA1 are reserved for future use and must be set to 0 when programming the EMR[3].
Integrated Silicon Solution, Inc. – www.issi.com –
Rev. 00A, 12/11/2009
A3‐A6, and A8‐A13 are reserved for future use and must be set to 0 when programming the EMR[2].
Only Industrial and Automotive grade devices support the high temperature Self‐Refresh Mode. The controller can set the EMR (2) [A7] bit to enable this self‐
refresh rate if Tc > 85°C while in self‐refresh operation. TOPER may not be violated.
If PASR (Partial Array Self Refresh) is enabled, data located in areas of the array beyond the specified address range will be lost if self refresh is entered. Data
integrity will be maintained if tREF conditions are met and no Self Refresh command is issued.
Mode Register
Address Field
Address
A13
A12
A11
A10
Field
A9
A8
A6
A5
A4
A3
BA2
BA1
BA0
A7
A2
A1
A0
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Register
PASR
Mode
SRFt
0
1
0
0
0
0
0
0
0
0
0
0
0
(3)
BA2
0*
BA1
1
BA0
1
A13
A7
A2
0*
0
1
0
0
0
0
1
1
1
1
A12
0*
A1
A11
0
0
1
1
0
0
1
1
0*
A10
0*
A0
High Temperature Self-Refresh Rate Enable
0
1
0
1
0
1
0
1
A9
0*
A8
0*
3/4 array(BA[2:0]=010, 011, 100, 101, 110, 111)
A7
0*
Half Array(BA[2:0]=000, 001, 010, 011)
Half array(BA[2:0]=100, 101, 110, 111)
Partial Array Self Refresh for 8 Banks
Enable
Disable
Quarter Array(BA[2:0]=000, 001)
Quarter array(BA[2:0]=110, 111)
A6
0*
(2)
1/8 array(BA[2:0]=000
1/8 array(BA[2:0]=111
A5
0*
Full Array
A4
0*
A3
0*
A2
0*
A1
0*
8
A0
0*