m24c32-wmn3p STMicroelectronics, m24c32-wmn3p Datasheet - Page 9
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m24c32-wmn3p
Manufacturer Part Number
m24c32-wmn3p
Description
Kbit, Kbit Kbit Serial Eeprom
Manufacturer
STMicroelectronics
Datasheet
1.M24C32-WMN3P.pdf
(34 pages)
M24128, M24C64, M24C32
2.3
2.3.1
2.3.2
2.3.3
Supply voltage (V
Operating supply voltage V
Prior to selecting the memory and issuing instructions to it, a valid and stable V
within the specified [V
In order to secure a stable DC supply voltage, it is recommended to decouple the V
with a suitable capacitor (usually of the order of 10nF to 100nF) close to the V
package pins.
This voltage must remain stable and valid until the end of the transmission of the instruction
and, for a Write instruction, until the completion of the internal write cycle (t
Internal device reset
In order to prevent inadvertent Write operations during Power-up, a Power On Reset (POR)
circuit is included. At Power-up (continuous rise of V
instruction until V
lower than the minimum V
When V
mode.
Power-down
At Power-down (continuous decrease of V
operating voltage to below the Power On Reset threshold voltage, the device stops
responding to any instruction sent to it.
During Power-down, the device must be deselected and in the Standby Power mode (that is
there should be no internal Write cycle in progress).
Figure 4.
20
16
12
8
4
0
10
CC
has passed the POR threshold, the device is reset and is in Standby Power
Maximum R
CC
has reached the Power On Reset threshold voltage (this threshold is
CC
(min), V
P
CC
CC
value versus bus parasitic capacitance (C) for an I
operating voltage defined in
)
C (pF)
CC
100
(max)] range must be applied (see
fc = 400kHz
CC
CC
fc = 100kHz
), as soon as V
CC
), the device does not respond to any
Table 9
CC
1000
drops from the normal
MASTER
and
V CC
Table 9
Table
Signal description
SDA
SCL
W
10).
).
and
CC
CC
R
/V
P
2
Table
C
C bus
voltage
SS
CC
AI01665b
line
R
10).
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P
C