m34d64-w STMicroelectronics, m34d64-w Datasheet
m34d64-w
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m34d64-w Summary of contents
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... Features 2 Two-wire I C serial interface supports 400 kHz protocol Single supply voltage: – 2.5 to 5.5 V for M34D64-W Hardware write control of the top quarter of memory byte and page write ( bytes) Random and Sequential Read modes Self-timed programming cycle Automatic address incrementing ...
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... Minimizing system delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 16 3.10 Read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.11 Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.12 Current Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.13 Sequential Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.14 Acknowledge in Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2/27 Serial Clock (SCL Serial Data (SDA Operating supply voltage Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power-down conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 M34D64 ...
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... M34D64 6 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 8 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Contents 3/27 ...
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... Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 7. Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 8. AC measurement conditions Table 9. Input parameters Table 10. DC characteristics Table 11. AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 12. SO8 narrow – 8 lead plastic small outline, 150 mils body width, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 13. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 14. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4/27 M34D64 ...
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... M34D64 List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. SO connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. Memory map showing write control area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 5. Maximum R value versus bus capacitance ( Figure bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 7. Write mode sequences with (data write enabled Figure 8. ...
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... Description 1 Description The M34D64-W are I devices organized as 8192 x 8 bits. These devices are compatible with the I interface that uses a bi-directional data bus and serial clock. The devices carry a built-in 4- bit Device Type Identifier code (1010) in accordance with the I The device behaves as a slave in the I by the serial clock ...
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... M34D64 Figure 2. SO connections 1. See Package mechanical M34D64 SCL SDA section for package dimensions, and how to identify pin-1. Description AI02851d 7/28 ...
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... M24xxx M24xxx 4.) from inadvertent write. The Write Control signal is used to enable ) write instructions to the top quarter of the memory area. IH supply voltage (Figure 5 indicates how CC Figure 3. When not connected (left Ai12806 , and write operations are allowed. IL M34D64 CC ...
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... M34D64 2.4 Supply voltage (V 2.4.1 Operating supply voltage V Prior to selecting the memory and issuing instructions to it, a valid and stable V within the specified [V secure a stable DC supply voltage recommended to decouple the V suitable capacitor (usually of the order 100 nF) close to the V pins. This voltage must remain stable and valid until the end of the transmission of the instruction and, for a Write instruction, until the completion of the internal write cycle (t 2 ...
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... Memory map showing write control area Figure 5. Maximum R value versus bus capacitance ( 10/28 1FFFh Write Controlled Area 1800h 1000h 0800h 0000h BUS fc = 100kHz fc = 400kHz 100 C BUS (pF) M34D64 AI03114C 2 ) for bus SDA MASTER C BUS SCL C BUS 1000 AI01665 ...
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... M34D64 2 Figure bus protocol SCL SDA SCL SDA Start condition SCL SDA Table 2. Device select code Device select code 1. The most significant bit, b7, is sent first. 2. E0, E1 and E2 are compared against the respective external pins on the memory device. Table 3. Most significant byte ...
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... The device that controls the data transfer is known as the bus master, and the other as the slave device. A data transfer can only be initiated by the bus master, which will also provide the serial clock for synchronization. The M34D64-W device is always a slave in all communications. ...
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... M34D64 3.5 Memory addressing To start communication between the bus master and the slave device, the bus master must initiate a Start condition. Following this, the bus master sends the Device Select Code, shown in Table 2.: Device select code The Device Select Code consists of a 4-bit Device Type Identifier, and a 3-bit Chip Enable “ ...
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... Dev sel Byte addr Byte addr R/W ACK ACK Data in N enabled), and waits for two address bytes. The device byte) is sent first, followed by the Least Significant Byte ( M34D64 ACK ACK Data in ACK ACK Data in 1 Data in 2 AI01106d Figure 7.: Write mode : ) ...
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... M34D64 3.7 Byte Write After the Device Select code and the address bytes, the bus master sends one data byte. If the addressed location is Write-protected (top quarter of the memory), by Write Control (WC) being driven high, the location is not modified. The bus master terminates the transfer ...
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... NO Stop Data for the Write operation Continue the Write operation characteristics, but the typical time is shorter. To make use of this, a Figure 8.: Write cycle polling flowchart using M34D64 Send address and receive ACK Start YES condition Device select with Continue the ...
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... M34D64 Figure 9. Read mode sequences Current Address Read Random Address Read Sequential Current Read Sequential Random Read 1. The seven most significant bits of the Device Select Code of a Random Read (in the 1 must be identical. 3.10 Read operations Read operations are performed independently of the state of the Write Control (WC) signal. ...
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... For all Read commands, the device waits, after each byte read, for an acknowledgment th during the 9 bit time. If the bus master does not drive Serial Data (SDA) low during this time, the device terminates the data transfer and switches to its Standby mode. 18/28 sequences, without acknowledging the byte. Figure 9.: Read mode sequences. M34D64 ...
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... M34D64 4 Initial delivery state The device is delivered with all bits in the memory array set to 1 (each byte contains FFh). 5 Maximum rating Stressing the device outside the ratings listed in cause permanent damage to the device. These are stress ratings only, and operation of the device at these, or any other conditions outside those indicated in the operating sections of this specification, is not implied ...
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... CC (1) Parameter Test condition V < 0 > 0.7V IN Single glitch Min. Max. 2.5 5.5 –40 85 Min. Max. 100 50 0. 0. Input and output timing reference levels 0.7V CC 0.3V CC AI00825c Min. Max 300 500 CC 100 M34D64 Unit V °C Unit Unit ...
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... M34D64 Table 10. DC characteristics Symbol Input leakage current I LI (SCL, SDA) I Output leakage current LO I Supply current CC I Standby supply current CC1 Input low voltage (E2, E1, E0, SCL, SDA Input low voltage (WC) Input high voltage V IH (E2, E1, E0, SCL, SDA, WC) V Output low voltage ...
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... Data out hold time Clock low to next data valid (access time) Start condition setup time Start condition hold time Stop condition setup time Time between Stop condition and next Start condition Write time M34D64 and Table 7.: Operating Min. Max. Unit 400 kHz ...
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... M34D64 Figure 11. AC waveforms tCHCL SCL tDLCL SDA In tCHDX Start condition SCL SDA In tCHDH Stop condition tCHCL SCL tCLQV SDA Out tCLCH tCLDX tDXCX SDA Change SDA Input tW Write cycle tCLQX Data Valid DC and AC parameters tCHDH tDHDL Stop Start condition condition ...
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... Max 1.75 0.1 0.25 1.25 0.28 0.48 0.17 0.23 0.1 4.9 4 5.8 6.2 3.9 3 0.25 0.5 0° 8° 0.4 1.27 1. 45˚ c 0.25 mm GAUGE PLANE SO-A (1) inches Typ Min 0.0039 0.0492 0.011 0.0067 0.1929 0.189 0.2362 0.2283 0.1535 0.1496 0.05 - 0.0098 0° 0.0157 0.0409 M34D64 Max 0.0689 0.0098 0.0189 0.0091 0.0039 0.1969 0.2441 0.1575 - 0.0197 8° 0.05 ...
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... ST sales office. The category of second-Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. Part numbering M34D64 – ...
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... Addresses on Memory Map figure corrected. 2 5ms offered on certain versions of the device (bearing process identification letter “B”) M34D64-R root part number removed (R voltage range removed). TSSOP8 package removed. SO8N packages are ECOPACK® compliant. SO8N package specifications updated (sse mechanical). Note removed below ...
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... M34D64 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...