m34d64-w STMicroelectronics, m34d64-w Datasheet - Page 6

• Manufacturer Part Number: m34d64-w
• Description: 64 Kbit Serial I2c Bus Eeprom With Hardware Write Control On Top Quarter Of Memory
• Manufacturer: STMicroelectronics

Description
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Description
The M34D64-W are I
devices organized as 8192 x 8 bits.
These devices are compatible with the I
interface that uses a bi-directional data bus and serial clock. The devices carry a built-in 4-
bit Device Type Identifier code (1010) in accordance with the I
The device behaves as a slave in the I
by the serial clock. Read and Write operations are initiated by a Start condition, generated
by the bus master. The Start condition is followed by a Device Select Code and Read/Write
bit (RW) (as described in
When writing data to the memory, the device inserts an acknowledge bit during the 9
time, following the bus master’s 8-bit transmission. When data is read by the bus master, the
bus master acknowledges the receipt of the data byte in the same way. Data transfers are
terminated by a Stop condition after an Ack for Write, and after a NoAck for Read.
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages.
ECOPACK® packages are Lead-free and RoHS compliant. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
Figure 1.
Table 1.
E0, E1, E2
SDA
SCL
WC
V
V
CC
SS
Signal name
Logic diagram
Signal names
2
C-compatible electrically erasable programmable memory (EEPROM)
Chip Enable
Serial Data
Serial Clock
Write Control
Supply voltage
Ground
Table 2.: Device select
E0-E2
SCL
WC
3
2
C protocol, with all memory operations synchronized
2
Function
V CC
M34D64-W
C memory protocol. This is a two-wire serial
V SS
code), terminated by an acknowledge bit.
SDA
AI02850c
2
C bus definition.
Input
I/O
Input
Input
Direction
M34D64
th
bit