m28w320ect STMicroelectronics, m28w320ect Datasheet - Page 40

• Manufacturer Part Number: m28w320ect
• Description: 32 Mbit 2mb X16, Boot Block 3v Supply Flash Memory
• Manufacturer: STMicroelectronics

M28W320ECT, M28W320ECB
Table 30. Primary Algorithm-Specific Extended Query Table
Note: 1. See Table 27, offset 15 for P pointer definition.
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(P+10)h = 45h
(P+11)h = 46h
(P+12)h = 47h
(P+13)h = 48h
(P+5)h = 3Ah
(P+6)h = 3Bh
(P+7)h = 3Ch
(P+8)h = 3Dh
(P+9)h = 3Eh
(P+A)h = 3Fh
(P+B)h = 40h
(P+C)h = 41h
(P+D)h = 42h
(P+E)h = 43h
(P+0)h = 35h
(P+1)h = 36h
(P+2)h = 37h
(P+3)h = 38h
(P+4)h = 39h
(P+F)h = 44h
P = 35h
Offset
(1)
00C0h
0050h
0052h
0049h
0031h
0030h
0066h
0000h
0000h
0000h
0001h
0003h
0000h
0030h
0001h
0080h
0000h
0003h
0003h
Data
Primary Algorithm extended Query table unique ASCII string “PRI”
Major version number, ASCII
Minor version number, ASCII
Extended Query table contents for Primary Algorithm. Address (P+5)h
contains less significant byte.
Supported Functions after Suspend
Read Array, Read Status Register and CFI Query are always supported
during Erase or Program operation
Block Lock Status
Defines which bits in the Block Status Register section of the Query are
implemented.
Address (P+A)h contains less significant byte
V
V
Number of Protection register fields in JEDEC ID space.
"00h," indicates that 256 protection bytes are available
Protection Field 1: Protection Description
This field describes user-available. One Time Programmable (OTP)
Protection register bytes. Some are pre-programmed with device unique
serial numbers. Others are user programmable. Bits 0–15 point to the
Protection register Lock byte, the section’s first byte.
The following bytes are factory pre-programmed and user-programmable.
Reserved
DD
PP
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
bit 8
bit 31 to 9
bit 0
bit 7 to 1
bit 0
bit 1
bit 15 to 2
bit 7 to 4
bit 3 to 0
bit 7 to 4
bit 3 to 0
bit 0 to 7
bit 8 to 15
bit 16 to 23
bit 24 to 31
Supply Optimum Program/Erase voltage
Logic Supply Optimum Program/Erase voltage (highest performance)
Block Lock Status Register Lock/Unlock bit active (1 = Yes, 0 = No)
Block Lock Status Register Lock-Down bit active (1 = Yes, 0 = No)
Chip Erase supported
Suspend Erase supported
Suspend Program supported
Legacy Lock/Unlock supported
Queued Erase supported
Instant individual block locking supported (1 = Yes, 0 = No)
Protection bits supported
Page mode read supported
Synchronous read supported
Reserved; undefined bits are ‘0’
Program supported after Erase Suspend (1 = Yes, 0 = No)
Reserved; undefined bits are ‘0’
Reserved for future use; undefined bits are ‘0’
HEX value in volts
BCD value in 100 mV
HEX value in volts
BCD value in 100 mV
Lock/bytes JEDEC-plane physical low address
Lock/bytes JEDEC-plane physical high address
"n" such that 2
"n" such that 2
n
n
Description
= factory pre-programmed bytes
= user programmable bytes
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
8 Byte
8 Byte
Value
12V
Yes
Yes
Yes
Yes
Yes
Yes
80h
00h
Yes
"P"
"R"
"1"
"0"
No
No
No
No
No
3V
01
"I"